ed44795511
shader: remaining decode and emitter fixes
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Decode and SPIR-V emitter corrections this title's shaders need: image and
memory operand handling, scalar ALU forms, and the IR plumbing that goes with
them.
2026-08-31 23:41:38 +05:30
dca7ece2ca
shader: legalize 1D level-zero gathers
2026-08-29 13:32:20 +04:00
770bdb9571
shader: separate formatless storage from image atomics
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: Senaxx <Senaxx@users.noreply.github.com >
2026-08-21 03:32:49 +02:00
719e20d470
shader: support bit-packed image surfaces
2026-08-21 03:32:49 +02:00
129c64235f
graphics: implement RDNA2 D16 image packing
2026-08-21 03:32:48 +02:00
85cf965d54
refactor(shader): centralize typed resource metadata
2026-08-21 03:32:47 +02:00
5383972e96
refactor(shader): preserve native wide buffer operations
2026-08-21 03:32:47 +02:00
49145c1902
refactor(shader): emit structured phis natively
2026-08-21 03:32:47 +02:00
d34e30d892
refactor(shader): emit SPIR-V declarations on demand
2026-08-21 03:32:47 +02:00
01275fb211
shader_recompiler: rename/clean up typed SSA SPIR-V emitter
2026-08-18 03:53:45 +02:00
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