mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 19:07:01 +02:00
261 lines
8.6 KiB
C++
261 lines
8.6 KiB
C++
#include "graphics/shader/recompiler/ir/passes/ReadLaneElimination.h"
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#include <algorithm>
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#include <queue>
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#include <unordered_map>
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#include <unordered_set>
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#include <vector>
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namespace Libs::Graphics::ShaderRecompiler::IR {
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namespace {
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struct ChainResult {
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Value value;
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Inst* write = nullptr;
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};
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ChainResult SearchChain(Value value, uint32_t lane, uint32_t wave_size) {
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for (;;) {
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value = value.Resolve();
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auto* inst = value.TryInstruction();
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if (inst == nullptr || inst->GetOpcode() != ValueOpcode::WriteLane) {
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return {value};
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}
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const auto selector = inst->Arg(2).Resolve();
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if (!selector.IsImmediate() || selector.GetType() != Type::U32) {
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return {value};
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}
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if (selector.U32() % wave_size == lane) {
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return {value, inst};
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}
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value = inst->Arg(0);
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}
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}
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bool IsPossibleToEliminate(Value source, uint32_t lane, uint32_t wave_size) {
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std::queue<Value> queue;
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std::unordered_set<Inst*> visited;
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queue.push(source);
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while (!queue.empty()) {
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const auto chain = SearchChain(queue.front(), lane, wave_size);
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queue.pop();
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if (chain.write != nullptr) {
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continue;
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}
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auto* inst = chain.value.TryInstruction();
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if (inst == nullptr || inst->GetOpcode() != ValueOpcode::Phi || inst->NumArgs() == 0) {
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return false;
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}
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if (!visited.insert(inst).second) {
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continue;
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}
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for (size_t index = inst->NumArgs(); index-- > 0;) {
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queue.push(inst->Arg(index));
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}
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}
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return true;
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}
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using PhiMap = std::unordered_map<Inst*, Inst*>;
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Value GetRealValue(PhiMap& phi_map, Value source, uint32_t lane, uint32_t wave_size) {
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const auto chain = SearchChain(source, lane, wave_size);
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if (chain.write != nullptr) {
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return chain.write->Arg(1);
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}
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auto* inst = chain.value.ResolveInstruction();
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EXIT_IF(inst->GetOpcode() != ValueOpcode::Phi);
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const auto [entry, is_new] = phi_map.try_emplace(inst);
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if (!is_new) {
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return Value(entry->second);
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}
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auto* block = inst->Parent();
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auto insertion_point = std::find_if(block->begin(), block->end(),
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[&](const Inst& candidate) { return &candidate == inst; });
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EXIT_IF(insertion_point == block->end());
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auto& phi = *block->PrependNewInst(insertion_point, ValueOpcode::Phi);
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phi.SetFlags(Type::U32);
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entry->second = φ
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std::vector<Value> arguments;
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arguments.reserve(inst->NumArgs());
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for (size_t index = 0; index < inst->NumArgs(); index++) {
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arguments.push_back(GetRealValue(phi_map, inst->Arg(index), lane, wave_size));
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}
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const auto first = arguments.front().Resolve();
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if (std::ranges::all_of(arguments,
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[&](Value argument) { return argument.Resolve() == first; })) {
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phi.ReplaceUsesWith(first);
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} else {
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for (size_t index = 0; index < arguments.size(); index++) {
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phi.AddPhiOperand(inst->PhiBlock(index), arguments[index]);
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}
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}
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return Value(&phi);
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}
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// A full-EXEC prefix scan with both half-wave endpoint reads is a reduction.
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// Fragment subgroups may have no physical invocation at either endpoint.
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class UMinReductionMatcher {
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public:
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explicit UMinReductionMatcher(Block* block): block(block) {}
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Value Match(const Inst& minimum) {
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const auto* low = Get(minimum.Arg(0), ValueOpcode::ReadLane);
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const auto* high = Get(minimum.Arg(1), ValueOpcode::ReadLane);
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if (low == nullptr || high == nullptr || low->Arg(0).Resolve() != high->Arg(0).Resolve()) {
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return {};
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}
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const auto lane = [](Value value, uint32_t expected) {
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value = value.Resolve();
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return value.IsImmediate() && value.GetType() == Type::U32 &&
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value.U32() % 64u == expected;
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};
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if (!((lane(low->Arg(1), 31) && lane(high->Arg(1), 63)) ||
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(lane(low->Arg(1), 63) && lane(high->Arg(1), 31)))) {
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return {};
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}
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const auto* joined = Get(Unwrap(low->Arg(0)), ValueOpcode::UMin32);
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if (joined == nullptr) return {};
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for (size_t index = 0; index < 2; index++) {
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auto attempt = *this;
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const auto* cross = attempt.Get(attempt.Unwrap(joined->Arg(index)), ValueOpcode::Permlane16U32);
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if (cross == nullptr) continue;
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const auto flags = cross->Flags<PermlaneFlags>();
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auto prefix = attempt.Unwrap(joined->Arg(1 - index));
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if (!flags.x16 || flags.fetch_inactive || !flags.bound_control ||
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cross->Arg(1).Resolve() != Value(UINT32_MAX) ||
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cross->Arg(2).Resolve() != Value(UINT32_MAX) ||
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!attempt.FullExec(cross->Arg(3)) || attempt.Unwrap(cross->Arg(0)) != prefix) {
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continue;
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}
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for (const uint32_t shift: {8u, 4u, 2u, 1u}) {
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prefix = attempt.MatchRow(prefix, shift);
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}
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prefix = attempt.Unwrap(prefix);
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if (prefix.IsEmpty() || attempt.saved_exec.IsEmpty()) return prefix;
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const auto* seed = attempt.Get(prefix, ValueOpcode::SelectU32);
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if (seed != nullptr && seed->Arg(2).Resolve() == Value(UINT32_MAX)) {
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const auto predicate = seed->Arg(0).Resolve();
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const auto* subset = attempt.Get(predicate, ValueOpcode::LogicalAnd);
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if (predicate == attempt.saved_exec ||
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(subset != nullptr && (subset->Arg(0).Resolve() == attempt.saved_exec ||
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subset->Arg(1).Resolve() == attempt.saved_exec))) {
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return prefix;
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}
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}
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}
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return {};
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}
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private:
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Inst* Get(Value value, ValueOpcode opcode) const {
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auto* inst = value.Resolve().TryInstruction();
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return inst != nullptr && inst->Parent() == block && inst->GetOpcode() == opcode
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? inst : nullptr;
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}
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bool FullExec(Value predicate) {
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predicate = predicate.Resolve();
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if (predicate == Value(true)) return true;
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const auto* either = Get(predicate, ValueOpcode::LogicalOr);
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if (either == nullptr) return false;
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for (size_t index = 0; index < 2; index++) {
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const auto* negate = Get(either->Arg(index), ValueOpcode::LogicalNot);
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if (negate == nullptr || negate->Arg(0).Resolve() != either->Arg(1 - index).Resolve()) continue;
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const auto original = negate->Arg(0).Resolve();
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if (saved_exec.IsEmpty()) saved_exec = original;
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return saved_exec == original;
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}
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return false;
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}
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Value Unwrap(Value value) {
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while (const auto* select = Get(value, ValueOpcode::SelectU32)) {
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if (!FullExec(select->Arg(0))) break;
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value = select->Arg(1);
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}
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return value.Resolve();
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}
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static bool IsRowShift(const Inst& inst, uint32_t shift) {
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const auto flags = inst.Flags<DppMoveFlags>();
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return flags.control == 0x110u + shift && flags.row_mask == 0xf &&
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flags.bank_mask == 0xf && !flags.fetch_inactive && !flags.bound_control && !flags.dpp8;
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}
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Value MatchRow(Value value, uint32_t shift) {
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const auto* update = Get(Unwrap(value), ValueOpcode::DppUpdateU32);
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if (update == nullptr || !IsRowShift(*update, shift) || !FullExec(update->Arg(2))) return {};
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const auto* minimum = Get(update->Arg(0), ValueOpcode::UMin32);
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if (minimum == nullptr) return {};
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for (size_t index = 0; index < 2; index++) {
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const auto* move = Get(minimum->Arg(index), ValueOpcode::DppMoveU32);
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if (move == nullptr || !IsRowShift(*move, shift) || !FullExec(move->Arg(1))) continue;
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const auto previous = Unwrap(minimum->Arg(1 - index));
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if (Unwrap(move->Arg(0)) == previous && Unwrap(update->Arg(1)) == previous) return previous;
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}
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return {};
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}
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Block* block;
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Value saved_exec;
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};
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} // namespace
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ReadLaneStats EliminateReadLane(Program& program, uint32_t wave_size) {
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ReadLaneStats stats;
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if (wave_size != 32u && wave_size != 64u) {
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return stats;
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}
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for (auto* block: program.blocks) {
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for (auto& inst: *block) {
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if (wave_size == 64u && inst.GetOpcode() == ValueOpcode::UMin32) {
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const auto seed = UMinReductionMatcher(block).Match(inst);
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if (!seed.IsEmpty()) {
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const auto position = std::find_if(block->begin(), block->end(),
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[&](const Inst& candidate) { return &candidate == &inst; });
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auto& reduction = *block->PrependNewInst(position, ValueOpcode::SubgroupUMinU32, {seed});
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inst.ReplaceUsesWith(Value(&reduction));
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stats.rewritten_reductions++;
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}
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continue;
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}
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if (inst.GetOpcode() != ValueOpcode::ReadLane) {
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continue;
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}
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const auto selector = inst.Arg(1).Resolve();
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if (!selector.IsImmediate() || selector.GetType() != Type::U32) {
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continue;
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}
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const auto lane = selector.U32() % wave_size;
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const auto chain = SearchChain(inst.Arg(0), lane, wave_size);
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if (chain.write != nullptr) {
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inst.ReplaceUsesWith(chain.write->Arg(1));
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stats.rewritten_reads++;
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continue;
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}
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auto* producer = chain.value.TryInstruction();
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if (producer == nullptr || producer->GetOpcode() != ValueOpcode::Phi ||
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!IsPossibleToEliminate(chain.value, lane, wave_size)) {
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continue;
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}
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PhiMap phi_map;
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inst.ReplaceUsesWith(GetRealValue(phi_map, chain.value, lane, wave_size));
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stats.rewritten_reads++;
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}
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}
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return stats;
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}
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} // namespace Libs::Graphics::ShaderRecompiler::IR
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