mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-22 03:46:53 +02:00
nmzik
204 lines
11 KiB
C++
204 lines
11 KiB
C++
#include "graphics/shader/recompiler/backend/spirv/spirvEmitterInternal.h"
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namespace Libs::Graphics::ShaderRecompiler::Spirv::Emitter {
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uint32_t EmitAndConstant(EmitterState& state, uint32_t value, uint32_t mask) {
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const auto ret = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpBitwiseAnd, TypeU32(state), ret, value,
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ConstantU32(state, mask));
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return ret;
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}
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uint32_t EmitCompareU32Constant(EmitterState& state, spv::Op opcode, uint32_t value,
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uint32_t constant) {
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const auto ret = state.builder.AllocateId();
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state.builder.AddFunction(opcode, TypeBool(state), ret, value, ConstantU32(state, constant));
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return ret;
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}
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F32Class EmitClassifyF32Bits(EmitterState& state, uint32_t bits) {
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const auto abs_bits = EmitAndConstant(state, bits, 0x7fffffffu);
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return {EmitCompareU32Constant(state, spv::OpUGreaterThan, abs_bits, 0x7f800000u),
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EmitCompareU32Constant(state, spv::OpIEqual, abs_bits, 0)};
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}
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uint32_t EmitClassMaskBitMatch(EmitterState& state, uint32_t mask, uint32_t bit,
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uint32_t class_match) {
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const auto selected =
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EmitCompareU32Constant(state, spv::OpINotEqual, EmitAndConstant(state, mask, 1u << bit), 0);
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return EmitLogicalAndBool(state, selected, class_match);
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}
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static uint32_t EmitClassMaskBits(EmitterState& state, uint32_t bits, uint32_t mask, bool half) {
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const uint32_t sign_mask = half ? 0x8000u : 0x80000000u;
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const uint32_t exponent_mask = half ? 0x7c00u : 0x7f800000u;
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const uint32_t mantissa_mask = half ? 0x03ffu : 0x007fffffu;
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const uint32_t quiet_mask = half ? 0x0200u : 0x00400000u;
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const auto sign_bits = EmitAndConstant(state, bits, sign_mask);
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const auto abs_bits = EmitAndConstant(state, bits, sign_mask - 1u);
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const auto exponent_bits = EmitAndConstant(state, abs_bits, exponent_mask);
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const auto mantissa_bits = EmitAndConstant(state, abs_bits, mantissa_mask);
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const auto quiet_bits = EmitAndConstant(state, mantissa_bits, quiet_mask);
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const auto sign = EmitCompareU32Constant(state, spv::OpINotEqual, sign_bits, 0);
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const auto positive = EmitLogicalNotBool(state, sign);
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const auto exponent_zero = EmitCompareU32Constant(state, spv::OpIEqual, exponent_bits, 0);
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const auto exponent_nonzero = EmitLogicalNotBool(state, exponent_zero);
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const auto exponent_inf =
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EmitCompareU32Constant(state, spv::OpIEqual, exponent_bits, exponent_mask);
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const auto finite_exponent = EmitLogicalNotBool(state, exponent_inf);
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const auto mantissa_zero = EmitCompareU32Constant(state, spv::OpIEqual, mantissa_bits, 0);
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const auto mantissa_nonzero = EmitLogicalNotBool(state, mantissa_zero);
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const auto quiet = EmitCompareU32Constant(state, spv::OpINotEqual, quiet_bits, 0);
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const auto nan_common = EmitLogicalAndBool(state, exponent_inf, mantissa_nonzero);
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const auto snan = EmitLogicalAndBool(state, nan_common, EmitLogicalNotBool(state, quiet));
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const auto qnan = EmitLogicalAndBool(state, nan_common, quiet);
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const auto inf = EmitLogicalAndBool(state, exponent_inf, mantissa_zero);
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const auto normal = EmitLogicalAndBool(state, exponent_nonzero, finite_exponent);
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const auto denorm = EmitLogicalAndBool(state, exponent_zero, mantissa_nonzero);
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const auto zero = EmitCompareU32Constant(state, spv::OpIEqual, abs_bits, 0);
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uint32_t match = EmitClassMaskBitMatch(state, mask, 0, snan);
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match = EmitLogicalOrBool(state, match, EmitClassMaskBitMatch(state, mask, 1, qnan));
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match = EmitLogicalOrBool(
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state, match, EmitClassMaskBitMatch(state, mask, 2, EmitLogicalAndBool(state, inf, sign)));
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match = EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 3, EmitLogicalAndBool(state, normal, sign)));
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match = EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 4, EmitLogicalAndBool(state, denorm, sign)));
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match = EmitLogicalOrBool(
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state, match, EmitClassMaskBitMatch(state, mask, 5, EmitLogicalAndBool(state, zero, sign)));
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match = EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 6, EmitLogicalAndBool(state, zero, positive)));
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match = EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 7, EmitLogicalAndBool(state, denorm, positive)));
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match = EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 8, EmitLogicalAndBool(state, normal, positive)));
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return EmitLogicalOrBool(
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state, match,
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EmitClassMaskBitMatch(state, mask, 9, EmitLogicalAndBool(state, inf, positive)));
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}
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uint32_t EmitClassMaskF32(EmitterState& state, uint32_t value, uint32_t mask) {
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return EmitClassMaskBits(state, EmitBitcastF32ToU32(state, value), mask, false);
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}
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uint32_t EmitClassMaskF16(EmitterState& state, uint32_t bits, uint32_t mask) {
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return EmitClassMaskBits(state, bits, mask, true);
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}
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static uint32_t EmitMinMaxF32(EmitterState& state, uint32_t lhs, uint32_t rhs, uint32_t lhs_bits,
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uint32_t rhs_bits, bool max_value) {
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// RDNA2 V_MIN/V_MAX_F32 return the other source for a NaN source (S1 when both are NaN)
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// and order -0 below +0. An unordered compare keeps S0 for a NaN S1 and, unlike NMin/NMax,
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// always returns the exact bits of one source.
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const auto either = EmitOrU32(state, lhs_bits, rhs_bits);
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const auto both_zero = EmitCompareU32Constant(state, spv::OpIEqual,
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EmitAndConstant(state, either, 0x7fffffffu), 0);
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const auto zero =
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EmitBitcastU32ToF32(state, max_value ? EmitAndU32(state, lhs_bits, rhs_bits) : either);
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const auto keep_lhs =
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Binary(state, max_value ? spv::OpFUnordGreaterThanEqual : spv::OpFUnordLessThan,
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TypeBool(state), lhs, rhs);
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const auto ordered = Select(state, TypeF32(state), keep_lhs, lhs, rhs);
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const auto numeric = Select(state, TypeF32(state), both_zero, zero, ordered);
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return Select(state, TypeF32(state), Unary(state, spv::OpIsNan, TypeBool(state), lhs), rhs,
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numeric);
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}
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uint32_t EmitMinMaxF32Value(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max_value) {
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if (state.profile.native_float_min_max) {
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const auto result = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpExtInst, TypeF32(state), result, GlslStd450(state),
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max_value ? GLSLstd450NMax : GLSLstd450NMin, lhs, rhs);
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return result;
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}
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return EmitMinMaxF32(state, lhs, rhs, EmitBitcastF32ToU32(state, lhs),
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EmitBitcastF32ToU32(state, rhs), max_value);
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}
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uint32_t EmitFPMedTri32(EmitterState& state, uint32_t a, uint32_t b, uint32_t c) {
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const auto a_bits = EmitBitcastF32ToU32(state, a);
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const auto b_bits = EmitBitcastF32ToU32(state, b);
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const auto c_bits = EmitBitcastF32ToU32(state, c);
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const auto min_ab = EmitMinMaxF32(state, a, b, a_bits, b_bits, false);
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const auto min3 =
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EmitMinMaxF32(state, min_ab, c, EmitBitcastF32ToU32(state, min_ab), c_bits, false);
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const auto max_ab = EmitMinMaxF32(state, a, b, a_bits, b_bits, true);
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const auto max3 =
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EmitMinMaxF32(state, max_ab, c, EmitBitcastF32ToU32(state, max_ab), c_bits, true);
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// RDNA2 compares numerically against MAX3, including ties between signed zeros, then takes
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// V_MAX_F32 of the other two sources in their original order.
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const auto a_is_max = Binary(state, spv::OpFOrdEqual, TypeBool(state), max3, a);
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const auto b_is_max = Binary(state, spv::OpFOrdEqual, TypeBool(state), max3, b);
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const auto x = Select(state, TypeF32(state), a_is_max, b, a);
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const auto y =
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Select(state, TypeF32(state), EmitLogicalOrBool(state, a_is_max, b_is_max), c, b);
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const auto median = EmitMinMaxF32Value(state, x, y, true);
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const auto is_nan = [&](uint32_t value) {
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return Unary(state, spv::OpIsNan, TypeBool(state), value);
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};
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const auto any_nan =
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EmitLogicalOrBool(state, EmitLogicalOrBool(state, is_nan(a), is_nan(b)), is_nan(c));
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return Select(state, TypeF32(state), any_nan, min3, median);
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}
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uint32_t EmitFlushF32DenormToSignedZero(EmitterState& state, uint32_t value) {
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// x * 0 keeps the sign of a denormal; NaN and infinity fail the ordered compare.
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const auto magnitude = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpExtInst, TypeF32(state), magnitude, GlslStd450(state),
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GLSLstd450FAbs, value);
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const auto denormal = Binary(state, spv::OpFOrdLessThan, TypeBool(state), magnitude,
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ConstantF32(state, 0x00800000u));
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return Select(state, TypeF32(state), denormal,
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Binary(state, spv::OpFMul, TypeF32(state), value, ConstantF32(state, 0)), value);
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}
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uint32_t EmitTrigCycleF32(EmitterState& state, uint32_t src, bool preserve_signed_zero) {
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const auto fract = state.builder.AllocateId();
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const auto bits = state.builder.AllocateId();
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const auto abs_bits = state.builder.AllocateId();
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const auto large = state.builder.AllocateId();
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const auto finite = state.builder.AllocateId();
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const auto large_finite = state.builder.AllocateId();
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const auto reduced = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpExtInst, TypeF32(state), fract, GlslStd450(state),
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GLSLstd450Fract, src);
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state.builder.AddFunction(spv::OpBitcast, TypeU32(state), bits, src);
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state.builder.AddFunction(spv::OpBitwiseAnd, TypeU32(state), abs_bits, bits,
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ConstantU32(state, 0x7fffffffu));
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state.builder.AddFunction(spv::OpUGreaterThanEqual, TypeBool(state), large, abs_bits,
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ConstantU32(state, 0x4b000000u));
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state.builder.AddFunction(spv::OpULessThan, TypeBool(state), finite, abs_bits,
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ConstantU32(state, 0x7f800000u));
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state.builder.AddFunction(spv::OpLogicalAnd, TypeBool(state), large_finite, large, finite);
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state.builder.AddFunction(spv::OpSelect, TypeF32(state), reduced, large_finite,
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ConstantF32(state, 0), fract);
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if (!preserve_signed_zero) {
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return reduced;
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}
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const auto zero = state.builder.AllocateId();
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const auto ret = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpIEqual, TypeBool(state), zero, abs_bits,
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ConstantU32(state, 0));
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state.builder.AddFunction(spv::OpSelect, TypeF32(state), ret, zero, src, reduced);
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return ret;
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}
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uint32_t EmitF16BitsToF32(EmitterState& state, uint32_t bits) {
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const auto unpacked = state.builder.AllocateId();
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const auto ret = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpExtInst, TypeF32Vector(state, 2), unpacked, GlslStd450(state),
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GLSLstd450UnpackHalf2x16, bits);
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state.builder.AddFunction(spv::OpCompositeExtract, TypeF32(state), ret, unpacked, 0);
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return ret;
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}
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} // namespace Libs::Graphics::ShaderRecompiler::Spirv::Emitter
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