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shader: build the V_MBCNT lanes-below mask with the shared right-mask helper

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nmzik
2026-10-21 23:11:26 +02:00
parent fa32940d14
commit 0cdc5c1224
1 changed files with 1 additions and 2 deletions
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src/graphics/shader/recompiler/frontend/translate/Integer.cpp
+1 -2
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@@ -327,8 +327,7 @@ void Translator::V_BCNT_U32_B32(const Decoder::Instruction& inst) {
void Translator::V_MBCNT_U32_B32(const Decoder::Instruction& inst, bool low) { void Translator::V_MBCNT_U32_B32(const Decoder::Instruction& inst, bool low) {
const auto lane = IR::U32(ir.Emit(IR::ValueOpcode::LaneId)); const auto lane = IR::U32(ir.Emit(IR::ValueOpcode::LaneId));
const auto local = ir.BitwiseAnd(lane, IR::U32(IR::Value(31u))); const auto local = ir.BitwiseAnd(lane, IR::U32(IR::Value(31u)));
const auto below = const auto below = RightMask32(local);
ir.ISub(ir.ShiftLeftLogical(IR::U32(IR::Value(1u)), local), IR::U32(IR::Value(1u)));
const auto high_lane = const auto high_lane =
IR::U1(ir.Emit(IR::ValueOpcode::UGreaterThanEqual32, {lane, IR::Value(32u)})); IR::U1(ir.Emit(IR::ValueOpcode::UGreaterThanEqual32, {lane, IR::Value(32u)}));
const auto thread_mask = low ? ir.Select(high_lane, IR::U32(IR::Value(0xffffffffu)), below) const auto thread_mask = low ? ir.Select(high_lane, IR::U32(IR::Value(0xffffffffu)), below)