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shader: keep mask predicates across 64-bit moves
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@@ -240,18 +240,30 @@ void Translator::MOV_B32(const Decoder::Instruction& inst, bool apply_float_modi
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}
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void Translator::S_MOV_B64(const Decoder::Instruction& inst) {
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const bool scalar_copy =
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inst.dst.kind == Decoder::OperandKind::Sgpr && inst.src0.kind == Decoder::OperandKind::Sgpr;
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const bool mask_source = inst.src0.kind == Decoder::OperandKind::Sgpr ||
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inst.src0.kind == Decoder::OperandKind::ExecLo ||
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inst.src0.kind == Decoder::OperandKind::VccLo;
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IR::U1 source_mask;
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IR::U1 source_mask_valid;
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if (scalar_copy) {
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source_mask = ir.GetThreadBitScalarReg(static_cast<IR::ScalarReg>(inst.src0.reg));
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source_mask_valid = ir.GetScalarMaskTag(static_cast<IR::ScalarReg>(inst.src0.reg));
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if (mask_source) {
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// A full VCC copy carries its predicate even in wave32; ReadMask also handles
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// individual 32-bit VCC halves, which cannot preserve that provenance.
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source_mask = inst.src0.kind == Decoder::OperandKind::VccLo ? ir.GetVcc()
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: ReadMask(inst.src0);
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source_mask_valid = ReadMaskValid(inst.src0);
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}
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// Preserve all 64 scalar bits independently of the per-thread predicate.
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WriteU32Pair(inst.dst, ReadU32Pair(inst.src0));
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if (scalar_copy) {
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ir.SetThreadBitScalarReg(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask);
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ir.SetScalarMaskTag(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask_valid);
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if (mask_source) {
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switch (inst.dst.kind) {
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case Decoder::OperandKind::ExecLo: ir.SetExec(source_mask); break;
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case Decoder::OperandKind::VccLo: ir.SetVcc(source_mask); break;
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case Decoder::OperandKind::Sgpr:
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ir.SetThreadBitScalarReg(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask);
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ir.SetScalarMaskTag(static_cast<IR::ScalarReg>(inst.dst.reg), source_mask_valid);
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break;
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default: break;
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}
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}
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}
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