shader: DS_READ_U16_D16, V_LSHRREV_B64,

This commit is contained in:
nmzik
2026-08-23 01:19:47 +02:00
parent a610528075
commit 8d01fb1c18
7 changed files with 156 additions and 4 deletions
@@ -103,6 +103,7 @@ constexpr MemoryOpcodeInfo DS_OPCODE_LIST[] = {
{0x4du, Opcode::DS_WRITE_B64, 2, 32}, {0x4eu, Opcode::DS_WRITE2_B64, 4, 32},
{0x4fu, Opcode::DS_WRITE2ST64_B64, 4, 32}, {0x76u, Opcode::DS_READ_B64, 2, 32},
{0x77u, Opcode::DS_READ2_B64, 4, 32}, {0x78u, Opcode::DS_READ2ST64_B64, 4, 32},
{0xa6u, Opcode::DS_READ_U16_D16, 1, 16},
{0xb0u, Opcode::DS_WRITE_ADDTID_B32, 1, 32}, {0xb1u, Opcode::DS_READ_ADDTID_B32, 1, 32},
{0xdeu, Opcode::DS_WRITE_B96, 3, 32}, {0xdfu, Opcode::DS_WRITE_B128, 4, 32},
{0xfeu, Opcode::DS_READ_B96, 3, 32}, {0xffu, Opcode::DS_READ_B128, 4, 32},
@@ -420,6 +421,11 @@ void DecodeDs(uint32_t pc, std::span<const uint32_t> code, uint32_t word_index,
}
DecodeVectorGpr(vdst, inst.dst);
if (inst.opcode == Opcode::DS_READ_U16_D16) {
// Native D16 reads update only the selected destination half. Reuse the partial
// destination representation so the typed lowering preserves the upper word.
inst.dst.sdwa_sel = 4u;
}
DecodeVectorGpr(addr, inst.src0);
DecodeVectorGpr(data0, inst.src1);
DecodeVectorGpr(data1, inst.src2);
@@ -299,6 +299,7 @@ enum class Opcode {
V_LSHRREV_B32,
V_ASHR_I32,
V_ASHRREV_I32,
V_LSHRREV_B64,
V_LSHLREV_B16,
V_LSHRREV_B16,
V_ASHRREV_I16,
@@ -492,6 +493,7 @@ enum class Opcode {
DS_READ_U8,
DS_READ_I16,
DS_READ_U16,
DS_READ_U16_D16,
DS_READ2_B32,
DS_READ2ST64_B32,
DS_READ_B32,
@@ -281,6 +281,7 @@ constexpr OpcodeMap VOP3_OPCODE_LIST[] = {
{0x16au, Opcode::V_MUL_HI_U32},
{0x16bu, Opcode::V_MUL_LO_I32},
{0x16cu, Opcode::V_MUL_HI_I32},
{0x300u, Opcode::V_LSHRREV_B64},
{0x303u, Opcode::V_ADD_NC_U16},
{0x304u, Opcode::V_SUB_NC_U16},
{0x307u, Opcode::V_LSHRREV_B16},
@@ -1247,6 +1248,7 @@ uint32_t NativeVop3SourceCount(Opcode opcode) {
case Opcode::V_MIN_I16:
case Opcode::V_ADD_NC_I16:
case Opcode::V_SUB_NC_I16:
case Opcode::V_LSHRREV_B64:
case Opcode::V_LSHLREV_B16:
case Opcode::V_LSHRREV_B16:
case Opcode::V_ASHRREV_I16: