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shader: decode and translate V_FRACT_F16 (VOP1 0x5f) and V_CMPX_LT_U16 (VOPC 0xb9) (#582)
shader: support V_FRACT_F16 and V_CMPX_LT_U16 Decode compact, SDWA, and VOP3 forms using the existing arithmetic and comparison paths. Preserve EXEC masking and VCC for the integer compare, and reject unsupported DPP encoding. Add captured-instruction, operand-selection, floating-point edge, and execution-mask regression coverage. Co-authored-by: nmzik <Nmzik@mail.ru>
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ADBHXNLOL
@@ -17835,6 +17835,91 @@ TestCase VectorSpecialF16Ops() {
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O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
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}
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TestCase VectorFractF16CapturedAndEdges() {
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using O = ShaderOpcode;
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// RDNA2 section 12.8: x - floor(x), rounded to half precision.
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// Load at runtime to exercise the emitted operation, including half subnormals.
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const std::array<u32, 18> inputs{
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0x3d00u, 0xbd00u, 0x0000u, 0x8000u, 0x0001u, 0x8001u,
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0x03ffu, 0x83ffu, 0x7bffu, 0xfbffu, 0x3800u, 0xb800u,
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0x8c00u, 0x8c01u, 0x7c00u, 0xfc00u, 0x7e55u, 0x7d01u};
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const std::array<u32, 18> fractions{
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0x3400u, 0x3a00u, 0x0000u, 0x0000u, 0x0001u, 0x3c00u,
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0x03ffu, 0x3c00u, 0x0000u, 0x0000u, 0x3800u, 0x3800u,
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0x3c00u, 0x3bffu, 0x7e00u, 0x7e00u, 0x7e00u, 0x7e00u};
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TestCase test;
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test.name = "VectorFractF16CapturedAndEdges";
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for (u32 bits : inputs) {
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test.initial.push_back(0x42000000u | bits); // Distinct high half must be ignored.
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}
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test.expected = test.initial;
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auto &code = test.code;
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for (u32 i = 0; i < inputs.size(); i++) {
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AppendVMovU32(&code, 30, i * 4u);
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AppendBufferLoadDword(&code, 7, 30);
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AppendVMovLiteral(&code, 9, 0xa5a51234u);
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code.push_back(0x7e12bf07u); // Captured v_fract_f16 v9, v7.
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if (i >= 14u) {
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// Check quiet NaN class without constraining its sign or payload.
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code.push_back(EncodeVop2(0x1b, 9, 255u, 9));
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code.push_back(0xffff7e00u);
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}
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AppendStoreVgpr(&code, 9, static_cast<u32>(inputs.size()) + i);
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test.expected.push_back(0xa5a50000u | fractions[i]);
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}
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AppendEnd(&code);
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test.opcodes = {O::V_MOV_B32, O::BUFFER_LOAD_DWORD, O::V_FRACT_F16,
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O::V_AND_B32, O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.decoded_counts = {{"V_FRACT_F16 v9, v7", inputs.size()}};
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test.ir_counts = {{" = FPFract32 ", inputs.size()}};
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test.required_spirv = {" Fract ", " PackHalf2x16 ", " UnpackHalf2x16 "};
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test.forbidden_spirv = {"OpCapability Float16"};
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return test;
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}
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TestCase VectorFractF16Modifiers() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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AppendVMovLiteral(&code, 7, 0xbd003d00u); // high=-1.25h, low=+1.25h
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for (u32 dst = 10; dst <= 19; dst++) {
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AppendVMovLiteral(&code, dst, 0xabcd1234u);
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}
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code.push_back(EncodeVop1(0x5f, 10, 249));
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code.push_back(EncodeVop1Sdwa(7, 5, 2, 5)); // high -> high, preserve low
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code.push_back(EncodeVop1(0x5f, 11, 249));
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code.push_back(EncodeVop1Sdwa(7, 4, 0, 5, 0, 1, 1)); // -abs(-1.25), pad high
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code.push_back(EncodeVop1(0x5f, 12, 249));
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code.push_back(EncodeVop1Sdwa(7, 4, 2, 5, 0, 0, 1)); // abs(-1.25)
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code.push_back(EncodeVop1(0x5f, 13, 249));
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code.push_back(EncodeVop1Sdwa(7, 4, 2, 5, 0, 0, 0, 0, 1, 1)); // *2, clamp
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code.push_back(EncodeVop1(0x5f, 14, 250));
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code.push_back(EncodeVop1Dpp(7, 0x0e4) | (1u << 20u)); // DPP identity, negate
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AppendVop3(&code, 0x1df, 15, Vgpr(7), 0, 0, 1, 0, true, 1, 1);
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code.push_back(EncodeVop1(0x5f, 16, 255));
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code.push_back(0x4200bd00u); // literal -1.25h
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code.push_back(EncodeVop1(0x5f, 17, 240)); // inline +0.5, interpreted as FP16
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AppendSMovLiteral(&code, 20, 0x4200bd00u);
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code.push_back(EncodeVop1(0x5f, 18, 20)); // SGPR source
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AppendVop3(&code, 0x1df, 19, Vgpr(7), 0, 0, 0, 0, false, 3); // *0.5
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for (u32 i = 0; i < 10; i++) {
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AppendStoreVgpr(&code, 10 + i, i);
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}
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AppendEnd(&code);
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TestCase test{"VectorFractF16Modifiers", code, {},
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{0x3a001234u, 0x00003a00u, 0xabcd3400u, 0xabcd3c00u,
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0xabcd3a00u, 0xabcd3c00u, 0xabcd3a00u, 0xabcd3800u,
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0xabcd3a00u, 0xabcd3000u},
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{O::V_MOV_B32, O::S_MOV_B32, O::V_FRACT_F16,
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O::BUFFER_STORE_DWORD, O::S_ENDPGM}};
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test.decoded_counts = {{"V_FRACT_F16", 10}};
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test.ir_counts = {{" = FPFract32 ", 10}};
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test.required_spirv = {" Fract ", " PackHalf2x16 "};
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return test;
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}
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TestCase VectorCosF16CapturedSdwaAndEdges() {
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using O = ShaderOpcode;
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@@ -19593,6 +19678,69 @@ TestCase VectorVopcCmpxGtU16CapturedSdwaExecMask() {
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return test;
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}
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TestCase VectorVopcCmpxLtU16CapturedSdwaExecMask() {
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using O = ShaderOpcode;
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struct CompareCase {
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u32 lhs;
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u32 rhs;
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u32 incoming_exec;
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u32 expected_exec;
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u32 encoding = 0; // Captured SDWA, compact, VOP3, WORD_1 src0/src1.
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};
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const std::array<CompareCase, 12> cases{{
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{0xffff0000u, 0x12340001u, 1, 1}, // Ignore high halves.
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{0xabcd0001u, 0x12340001u, 1, 0}, // Strict comparison: equal is false.
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{0x0000ffffu, 0x12340001u, 1, 0}, // Unsigned, not signed -1.
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{0x00007fffu, 0x12348000u, 1, 1},
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{0x00008000u, 0x12347fffu, 1, 0},
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{0x12340000u, 0x56780000u, 1, 0},
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{0x0000fffeu, 0x1234ffffu, 1, 1},
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{0x00000000u, 0x12340001u, 0, 0}, // CMPX cannot reactivate an inactive lane.
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{0x00008000u, 0x0000ffffu, 1, 1, 1},
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{0x0000ffffu, 0x00008000u, 1, 0, 2},
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{0x0001ffffu, 0x12340002u, 1, 1, 3},
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{0x00000001u, 0x00020000u, 1, 1, 4},
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}};
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constexpr u32 vcc_hi = 0x89abcdefu;
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TestCase test;
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test.name = "VectorVopcCmpxLtU16CapturedSdwaExecMask";
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for (const auto &entry : cases) {
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test.initial.push_back(entry.lhs);
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}
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test.expected = test.initial;
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auto &code = test.code;
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for (u32 i = 0; i < cases.size(); ++i) {
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const auto &entry = cases[i];
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AppendVMovU32(&code, 30, i * 4u);
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AppendBufferLoadDword(&code, 0, 30); // Runtime input prevents constant folding.
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AppendVMovU32(&code, 1, entry.rhs);
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AppendSMovLiteral(&code, 106, entry.rhs);
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AppendSMovLiteral(&code, 107, vcc_hi);
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code.push_back(EncodeSMovB32(126, InlineU32(entry.incoming_exec)));
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switch (entry.encoding) {
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case 1: code.push_back(0x7d720300u); break; // compact v0, v1
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case 2: code.insert(code.end(), {0xd4b9007eu, 0x00020300u}); break;
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case 3: code.insert(code.end(), {0x7d72d4f9u, 0x86050000u}); break;
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case 4: code.insert(code.end(), {0x7d72d4f9u, 0x85060000u}); break;
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default: code.insert(code.end(), {0x7d72d4f9u, 0x86060000u}); break;
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}
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code.push_back(EncodeSMovB32(20, 126)); // Snapshot EXEC before restoring it.
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code.push_back(EncodeSMovB32(21, 127));
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code.push_back(EncodeSMovB32(126, InlineU32(1)));
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const u32 out = static_cast<u32>(cases.size()) + i * 4u;
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AppendStoreSgprPair(&code, 20, out);
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AppendStoreSgprPair(&code, 106, out + 2u); // CMPX must not overwrite either VCC half.
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test.expected.insert(test.expected.end(),
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{entry.expected_exec, 0u, entry.rhs, vcc_hi});
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}
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AppendEnd(&code);
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test.opcodes = {O::V_MOV_B32, O::S_MOV_B32, O::BUFFER_LOAD_DWORD,
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O::V_CMPX_LT_U16, O::BUFFER_STORE_DWORD, O::S_ENDPGM};
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test.decoded_counts = {{"V_CMPX_LT_U16", cases.size()}};
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test.required_spirv = {"OpULessThan"};
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return test;
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}
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TestCase VectorVopcCmpxNgtF16CapturedSdwaExecMask() {
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using O = ShaderOpcode;
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@@ -24928,6 +25076,8 @@ std::vector<TestCase> MakeCases() {
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AddCase(NativeAndSdwa16BitDestinationWrites);
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AddCase(VectorMinMaxMed3F16Ops);
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AddCase(VectorSpecialF16Ops);
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AddCase(VectorFractF16CapturedAndEdges);
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AddCase(VectorFractF16Modifiers);
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AddCase(VectorCosF16CapturedSdwaAndEdges);
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AddCase(VectorSinF16SdwaAndEdges);
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AddCase(VectorWritelaneIgnoresExecMask);
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@@ -24980,6 +25130,7 @@ std::vector<TestCase> MakeCases() {
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AddCase(VectorVop3CmpxWritesExecMask);
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AddCase(VectorVopcSdwaCmpxWritesExecMask);
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AddCase(VectorVopcCmpxGtU16CapturedSdwaExecMask);
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AddCase(VectorVopcCmpxLtU16CapturedSdwaExecMask);
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AddCase(VectorVopcCmpxNgtF16CapturedSdwaExecMask);
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AddCase(VectorCompareInvertedMaskSelect);
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AddCase(BranchSelect);
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@@ -29204,6 +29355,26 @@ int main(int argc, char **argv) {
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std::setvbuf(stdout, nullptr, _IONBF, 0);
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EnsureConfigInitialized();
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CheckLeastRecentlyUsedCacheOrdering();
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if (argc == 2 && std::strcmp(argv[1], "--cmpx-lt-u16-only") == 0) {
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VulkanHarness vulkan;
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RunCase(&vulkan, VectorVopcCmpxLtU16CapturedSdwaExecMask());
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RunCase(&vulkan, VectorVopcCmpxGtU16CapturedSdwaExecMask());
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RunCase(&vulkan, VectorVopcSdwaCmpxWritesExecMask());
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RunCase(&vulkan, VectorVop3CmpxWritesExecMask());
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RunCase(&vulkan, VectorVopcSdwaCmpxClassF32CapturedExecMask());
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--fract-f16-only") == 0) {
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VulkanHarness vulkan;
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RunCase(&vulkan, VectorFractF16CapturedAndEdges());
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RunCase(&vulkan, VectorFractF16Modifiers());
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RunCase(&vulkan, NativeAndSdwa16BitDestinationWrites());
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RunCase(&vulkan, VectorSpecialF16Ops());
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RunCase(&vulkan, VectorCosF16CapturedSdwaAndEdges());
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RunCase(&vulkan, VectorSinF16SdwaAndEdges());
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RunCase(&vulkan, VectorFloatConversionOps());
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return 0;
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}
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if (argc == 2 && std::strcmp(argv[1], "--packed-texture-only") == 0) {
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VulkanHarness vulkan;
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vulkan.CheckPackedTextureComponents();
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