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shader: return the first source when both 64-bit min/max inputs are NaN
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@@ -20,11 +20,11 @@ uint32_t EmitMinMaxF64(EmitterState& state, uint32_t lhs, uint32_t rhs, bool max
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result = Select(state, TypeF64(state), equal,
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Unary(state, spv::OpBitcast, TypeF64(state), equal_bits), result);
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// Non-IEEE mode selects the other operand for NaN, including rhs when both are NaN.
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result = Select(state, TypeF64(state), Unary(state, spv::OpIsNan, TypeBool(state), rhs),
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lhs, result);
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return Select(state, TypeF64(state), Unary(state, spv::OpIsNan, TypeBool(state), lhs),
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rhs, result);
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// Non-IEEE mode selects the other operand for NaN, and lhs when both are NaN.
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result = Select(state, TypeF64(state), Unary(state, spv::OpIsNan, TypeBool(state), lhs),
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rhs, result);
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return Select(state, TypeF64(state), Unary(state, spv::OpIsNan, TypeBool(state), rhs),
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lhs, result);
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}
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uint32_t EmitMulHigh(EmitterState& state, uint32_t lhs, uint32_t rhs, bool signed_value) {
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@@ -28735,7 +28735,7 @@ TestCase VectorFractF64CapturedAndEdges() {
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TestCase VectorMinMaxF64CapturedAndEdges() {
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using O = ShaderOpcode;
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// MODE.IEEE=0: select the numeric operand, or the second NaN unchanged.
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// MODE.IEEE=0: select the numeric operand, or the first NaN unchanged.
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constexpr uint64_t positive_zero = 0, negative_zero = 0x8000000000000000ull;
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constexpr uint64_t one = 0x3ff0000000000000ull, minus_two = 0xc000000000000000ull;
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constexpr uint64_t qnan = 0x7ff8123456789abcull, snan = 0xfff0000000000042ull;
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@@ -28749,7 +28749,7 @@ TestCase VectorMinMaxF64CapturedAndEdges() {
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{positive_zero, positive_zero, positive_zero, positive_zero},
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{qnan, one, one, one}, {one, qnan, one, one},
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{snan, minus_two, minus_two, minus_two}, {minus_two, snan, minus_two, minus_two},
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{qnan, snan, snan, snan}, {snan, qnan, qnan, qnan},
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{qnan, snan, qnan, qnan}, {snan, qnan, snan, snan},
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{infinity, one, one, infinity},
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{infinity | negative_zero, one, infinity | negative_zero, one},
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{0x3fe0000000000000ull, one, 0x3fe0000000000000ull, one},
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