mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-19 18:36:53 +02:00
graphics: skip compute dispatches with BVH instructions
Co-authored-by: Mac <me@itsmemac.com>
This commit is contained in:
@@ -204,6 +204,7 @@ struct PipelineCache::ProgramCache {
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ShaderRecompiler::IR::ResourceSnapshot resources;
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ShaderRecompiler::IR::ResourceSpecialization specialization;
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std::vector<Permutation> permutations;
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bool skip_dispatch = false;
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};
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struct ProgramKeyHash {
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@@ -283,6 +284,9 @@ struct PipelineCache::ProgramCache {
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lookup_key.code_size = static_cast<uint32_t>(params.code.size());
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BuildStageStaticKey(input_info, lookup_key.static_state);
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auto entry = programs.find(lookup_key);
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if (entry != programs.end() && entry->second.skip_dispatch) {
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return {};
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}
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const ShaderRecompiler::IR::SrtRuntime runtime {
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.user_data = user_data,
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.shader_base = params.Base(),
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@@ -348,6 +352,11 @@ struct PipelineCache::ProgramCache {
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options.wave_size = input_info.wave_size;
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}
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auto translated = ShaderRecompiler::TranslateProgram(params.code, options);
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if (translated.skip_dispatch) {
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entry = programs.try_emplace(lookup_key, ShaderRecompiler::IR::ResourcePlan {}).first;
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entry->second.skip_dispatch = true;
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return {};
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}
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if (entry == programs.end()) {
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entry = programs.try_emplace(lookup_key,
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ShaderRecompiler::IR::ExtractResourcePlan(translated.program)).first;
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@@ -256,6 +256,10 @@ void RenderExecutor::DispatchDirect(uint64_t submit_id, CommandBuffer& buffer,
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input_info.dispatch_thread_dimensions = use_thread_dimensions;
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const auto compute_program =
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m_context.GetPipelineCache().GetComputeProgram(cs_regs, sh_regs, input_info);
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if (!compute_program) {
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// Temporary until RT is implemented.
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return;
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}
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if (use_thread_dimensions) {
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input_info.dispatch_threads_num[0] = thread_group_x;
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input_info.dispatch_threads_num[1] = thread_group_y;
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@@ -413,6 +417,10 @@ void RenderExecutor::DispatchIndirect(uint64_t submit_id, CommandBuffer& buffer,
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ShaderComputeInputInfo input_info {};
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const auto compute_program = m_context.GetPipelineCache().GetComputeProgram(
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cs_regs, buffer.GetRegisters().GetShaderRegisters(), input_info);
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if (!compute_program) {
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// Temporary until RT is implemented.
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return;
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}
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buffer.EndRendering();
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auto& pipeline = m_context.GetPipelineCache().GetComputePipeline(input_info, compute_program);
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auto& bindings = m_compute_bindings;
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@@ -20,6 +20,7 @@
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#include <algorithm>
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#include <array>
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#include <atomic>
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#include <chrono>
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#include <fmt/format.h>
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#include <map>
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@@ -523,6 +524,20 @@ TranslateResult TranslateProgram(std::span<const uint32_t> code, const CompileOp
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GetDumpLabel(options), StageName(options.stage), options.shader_hash,
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static_cast<uint64_t>(decoded.instructions.size()), phase_ms());
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// Temporary workaround for games that compile ray-tracing shaders before
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// the player can select a mode without ray tracing.
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if (options.stage == ShaderType::Compute && decoded.has_bvh) {
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static std::atomic_flag warned = ATOMIC_FLAG_INIT;
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if (!warned.test_and_set(std::memory_order_relaxed)) {
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const auto& bvh = decoded.instructions.back();
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Log::WriteToConsoleAndLog(fmt::format(
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"Warning: ray tracing is not implemented; skipping compute dispatches containing "
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"BVH intersection instructions (shader=0x{:016x}, pc=0x{:08x}, opcode=0x{:02x}).\n",
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options.shader_hash, bvh.pc, bvh.opcode_id));
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}
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return {.skip_dispatch = true};
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}
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std::string decoded_dump;
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if (options.dump_ir) {
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decoded_dump = Decoder::ProgramToString(decoded);
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@@ -615,6 +630,7 @@ TranslateResult TranslateProgram(std::span<const uint32_t> code, const CompileOp
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CompileResult CompileProgram(TranslateResult translated, const CompileOptions& options,
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const IR::ResourceSpecialization& specialization,
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uint32_t push_data_start_dword) {
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EXIT_IF(translated.skip_dispatch);
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const auto emit_begin = std::chrono::steady_clock::now();
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auto& ir = translated.program;
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IR::ApplyResourceSpecialization(ir, specialization);
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@@ -28,6 +28,7 @@ struct TranslateResult {
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IR::Program program;
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std::string decoded_dump;
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std::string cfg_dump;
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bool skip_dispatch = false;
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};
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struct CompileResult {
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@@ -403,6 +403,7 @@ void DecodeProgram(std::span<const uint32_t> code, Program& program) {
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program.instructions.clear();
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program.instructions.reserve(code.size());
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program.code = code;
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program.has_bvh = false;
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std::vector<bool> branch_targets;
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for (uint32_t word_index = 0; word_index < code.size();) {
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@@ -411,6 +412,10 @@ void DecodeProgram(std::span<const uint32_t> code, Program& program) {
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const auto& inst = program.instructions.back();
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word_index += inst.word_count;
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if (inst.family == Family::MIMG && (inst.opcode_id == 0xe6u || inst.opcode_id == 0xe7u)) {
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program.has_bvh = true;
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return;
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}
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if (IsDirectBranch(inst.opcode)) {
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const auto target_index = inst.branch_target / sizeof(uint32_t);
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@@ -731,6 +731,7 @@ struct Instruction {
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struct Program {
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std::span<const uint32_t> code;
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std::vector<Instruction> instructions;
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bool has_bvh = false;
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};
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// Code spans are trusted to contain complete instructions, valid branch targets, and 32-bit PCs.
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@@ -0,0 +1,87 @@
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void TestRayTracingDispatchDetection() {
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namespace D = ShaderRecompiler::Decoder;
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const auto check_decoded = [](std::span<const uint32_t> code, bool expected,
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const char *message) {
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D::Program decoded;
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D::DecodeProgram(code, decoded);
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Check(decoded.has_bvh == expected, message);
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if (expected) {
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const auto &last = decoded.instructions.back();
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Check(last.family == D::Family::MIMG &&
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(last.opcode_id == 0xe6u || last.opcode_id == 0xe7u),
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"decoder continued past the first BVH instruction");
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const auto result = ShaderRecompiler::TranslateProgram(
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code, MakeCompileOptions(ShaderType::Compute));
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Check(result.skip_dispatch && result.program.blocks.empty() && result.cfg_dump.empty(),
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"BVH compute shader reached IR translation");
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}
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};
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const auto check = [&](std::initializer_list<uint32_t> code, bool expected,
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const char *message) {
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check_decoded(std::span<const uint32_t>{code.begin(), code.size()}, expected, message);
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};
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check({0xf1989f01u, 0x00081014u, EncodeSopp(0x01)}, true,
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"captured contiguous BVH instruction did not skip dispatch");
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check({0xf1989f07u, 0x00071001u, 0x3d3e3c15u, 0x38095851u, 0x00003a39u,
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EncodeSopp(0x01)}, true,
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"captured NSA BVH instruction did not skip dispatch");
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check({0xf19c9f01u, 0x00081014u, EncodeSopp(0x01)}, true,
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"RDNA2 BVH64 instruction did not skip dispatch");
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check({0xbe8e210eu, 0xf1989f01u, 0x00081014u, EncodeSopp(0x01)}, true,
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"unsupported SWAPPC before BVH prevented dispatch detection");
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check({0xf1989f01u, 0x00081014u, 0xc0000000u, EncodeSopp(0x01)}, true,
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"unknown instruction after BVH prevented dispatch skipping");
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for (uint32_t opcode : {0xe6u, 0xe7u}) {
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for (uint32_t nsa = 0; nsa < 4; ++nsa) {
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for (uint32_t slc = 0; slc < 2; ++slc) {
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std::array<uint32_t, 6> code{
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EncodeMimg0(opcode, 0xf, true) | (nsa << 1u) | (slc << 25u),
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EncodeMimg1(0, 0, 0, 0)};
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code[2 + nsa] = EncodeSopp(0x01);
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check_decoded(std::span(code).first(3 + nsa), true,
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"BVH cache flags or NSA length prevented dispatch detection");
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}
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}
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}
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for (uint32_t opcode : {0x66u, 0x67u, 0xe4u, 0xe5u, 0xe8u, 0xe9u}) {
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check({EncodeMimg0(opcode, 0xf), EncodeMimg1(0, 0, 0, 0), EncodeSopp(0x01)},
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false, "non-BVH image opcode was incorrectly skipped");
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}
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check({EncodeSMovB32(0, 255), 0xf1989f01u, EncodeSopp(0x01)}, false,
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"scalar literal was mistaken for a BVH instruction");
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check({EncodeMimg0(0x20, 0xf) | 6u, EncodeMimg1(0, 0, 0, 0),
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0xf1989f01u, 0xf19c9f01u, 0u, EncodeSopp(0x01)}, false,
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"NSA address words were mistaken for BVH instructions");
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check({EncodeMimg0(0x20, 0xf), 0xf1989f01u, EncodeSopp(0x01)}, false,
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"MIMG operand word was mistaken for a BVH instruction");
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check({EncodeSopp(0x01), 0xf1989f01u, 0x00081014u}, false,
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"data after the shader end was mistaken for a BVH instruction");
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check({EncodeMimg0(0x20, 0xf), EncodeMimg1(0, 0, 0, 0), EncodeSopp(0x01)},
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false, "ordinary image shader was incorrectly skipped");
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// An end instruction on one branch does not end another branch's code.
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check({EncodeSopp(0x04, 1), EncodeSopp(0x01), 0xf1989f01u, 0x00081014u,
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EncodeSopp(0x01)}, true,
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"BVH at a branch target after an early end was not detected");
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const std::array bvh_code{0xf1989f01u, 0x00081014u, 0xf19c9f01u, 0x00081014u,
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EncodeSopp(0x01)};
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const std::array ordinary_code{EncodeSMovB32(0, 255), 0xf1989f01u, EncodeSopp(0x01)};
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D::Program reused;
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D::DecodeProgram(bvh_code, reused);
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Check(reused.has_bvh && reused.instructions.size() == 1,
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"decoder did not stop at the first BVH instruction");
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D::DecodeProgram(ordinary_code, reused);
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Check(!reused.has_bvh, "decoder retained stale BVH metadata");
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for (const auto stage : {ShaderType::Compute, ShaderType::Vertex, ShaderType::Pixel}) {
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const auto options = MakeCompileOptions(stage);
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Check(!ShaderRecompiler::TranslateProgram(ordinary_code, options).skip_dispatch,
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"BVH-shaped literal marked an ordinary shader for skipping");
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const auto compiled = RecompileForTest(ordinary_code, options);
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Check(!compiled.spirv.empty(), "ordinary shader did not compile");
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CheckSpirvBinaryValidates(compiled.spirv);
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}
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}
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@@ -13517,6 +13517,8 @@ void TestNewShaderRecompilerSpirvSizeBaselines() {
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CheckSpirvPhiParents(dispatcher_result.spirv);
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}
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#include "ShaderRayTracingTests.inc"
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} // namespace
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} // namespace Libs::Graphics
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@@ -13524,6 +13526,7 @@ int main() {
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using namespace Libs::Graphics;
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EnsureConfigInitialized();
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TestRayTracingDispatchDetection();
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TestResourceDescriptorClassification();
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TestShaderBufferResourceSize();
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TestNativeShaderResourceDependencies();
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