mirror of
https://github.com/KytyPS5/KytyPS5.git
synced 2026-10-20 02:47:02 +02:00
shader: correct DS float min/max operands and special values
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
This commit is contained in:
nmzik
@@ -463,6 +463,9 @@ void EmitAtomicMemoryBarrier(EmitterState& state, IR::ResourceKind kind);
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uint32_t EmitFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t source,
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bool max_value);
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uint32_t EmitDsFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t source,
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bool max_value);
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uint32_t EmitDsSwizzleTargetLane(EmitterState& state, uint32_t subid, uint32_t control);
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inline constexpr auto EmitSelectValueU32 =
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@@ -1227,34 +1227,10 @@ uint32_t EmitBufferFloatAtomic(ValueEmitContext& ctx, const IR::Inst& inst) {
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void EmitSharedFloatAtomic(ValueEmitContext& ctx, const IR::Inst& inst) {
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const auto& mem = ctx.Memory(inst);
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const bool max_value = inst.GetOpcode() == IR::ValueOpcode::SharedAtomicFMax32;
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EmitIfCondition(ctx.state, ctx.Arg(inst, inst.NumArgs() - 1), [&]() {
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const auto index = DwordIndex(ctx, inst, mem);
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const auto resource = PrepareMemoryResourceAccess(ctx.state, mem);
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EmitIfCondition(
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ctx.state, EmitMemoryElementInBounds(ctx.state, resource, index), [&]() {
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ctx.state.builder.AddFunction(spv::OpStore, ctx.scratch_u32_variable,
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ctx.Arg(inst, 1));
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const auto data = ctx.state.builder.AllocateId();
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ctx.state.builder.AddFunction(spv::OpLoad, TypeU32(ctx.state), data,
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ctx.scratch_u32_variable);
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AtomicUpdate(
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ctx.state, EmitMemoryElementPointer(ctx.state, resource, index),
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mem.kind, [&](uint32_t old) {
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const auto old_f =
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Unary(ctx.state, spv::OpBitcast, TypeF32(ctx.state), old);
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const auto compare_f =
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Unary(ctx.state, spv::OpBitcast, TypeF32(ctx.state), ctx.Arg(inst, 2));
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const auto data_f =
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Unary(ctx.state, spv::OpBitcast, TypeF32(ctx.state), data);
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const auto compare = Binary(
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ctx.state, max_value ? spv::OpFOrdGreaterThan : spv::OpFOrdLessThan,
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TypeBool(ctx.state), max_value ? old_f : compare_f,
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max_value ? compare_f : old_f);
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return Unary(ctx.state, spv::OpBitcast, TypeU32(ctx.state),
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Select(ctx.state, TypeF32(ctx.state), compare, data_f, old_f));
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});
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});
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});
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EmitAtomicUpdate(ctx, inst, mem,
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[max_value](EmitterState& state, uint32_t old, uint32_t value) {
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return EmitDsFloatAtomicReplacement(state, old, value, max_value);
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});
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}
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uint32_t EmitAppendConsume(ValueEmitContext& ctx, const IR::Inst& inst) {
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@@ -438,6 +438,20 @@ void EmitAtomicMemoryBarrier(EmitterState& state, IR::ResourceKind kind) {
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ConstantU32(state, spv::MemorySemanticsAcquireReleaseMask | memory));
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}
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namespace {
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uint32_t FloatOrderKey(EmitterState& state, uint32_t bits) {
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const auto negative = EmitCompareU32Constant(state, spv::OpINotEqual,
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EmitAndConstant(state, bits, 0x80000000u), 0u);
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const auto negative_key = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpNot, TypeU32(state), negative_key, bits);
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const auto positive_key =
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EmitBinaryU32(state, spv::OpBitwiseXor, bits, ConstantU32(state, 0x80000000u));
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return EmitSelectValueU32(state, negative, negative_key, positive_key);
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}
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} // namespace
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uint32_t EmitFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t source,
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bool max_value) {
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struct OrderedBits {
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@@ -447,15 +461,7 @@ uint32_t EmitFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t
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};
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const auto classify = [&](uint32_t bits) {
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const auto cls = EmitClassifyF32Bits(state, bits);
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const auto negative = EmitCompareU32Constant(state, spv::OpINotEqual,
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EmitAndConstant(state, bits, 0x80000000u), 0u);
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const auto negative_key = state.builder.AllocateId();
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state.builder.AddFunction(spv::OpNot, TypeU32(state), negative_key, bits);
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const auto positive_key =
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EmitBinaryU32(state, spv::OpBitwiseXor, bits, ConstantU32(state, 0x80000000u));
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return OrderedBits {
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cls.nan, cls.zero,
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EmitSelectValueU32(state, negative, negative_key, positive_key)};
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return OrderedBits {cls.nan, cls.zero, FloatOrderKey(state, bits)};
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};
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const auto source_class = classify(source);
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const auto old_class = classify(old);
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@@ -470,6 +476,45 @@ uint32_t EmitFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t
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old);
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}
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uint32_t EmitDsFloatAtomicReplacement(EmitterState& state, uint32_t old, uint32_t source,
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bool max_value) {
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struct OrderedBits {
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uint32_t nan;
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uint32_t signaling_nan;
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uint32_t key;
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};
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const auto classify = [&](uint32_t bits) {
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const auto abs = EmitAndConstant(state, bits, 0x7fffffffu);
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const auto nan = EmitCompareU32Constant(state, spv::OpUGreaterThan, abs, 0x7f800000u);
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const auto signaling_nan = EmitLogicalAndBool(
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state, nan, EmitCompareU32Constant(state, spv::OpIEqual,
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EmitAndConstant(state, bits, 0x00400000u), 0u));
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const auto small = EmitCompareU32Constant(state, spv::OpULessThan, abs, 0x00800000u);
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const auto sign = EmitAndConstant(state, bits, 0x80000000u);
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const auto positive_denorm = EmitLogicalAndBool(
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state, EmitCompareU32Constant(state, spv::OpIEqual, sign, 0u),
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EmitCompareU32Constant(state, spv::OpINotEqual, abs, 0u));
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// Negative denorms tie with -0; positive denorms tie only with each other.
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const auto small_bits = EmitSelectValueU32(
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state, positive_denorm, ConstantU32(state, 1u), sign);
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const auto key_bits = EmitSelectValueU32(state, small, small_bits, bits);
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return OrderedBits {nan, signaling_nan, FloatOrderKey(state, key_bits)};
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};
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const auto lhs = classify(old);
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const auto rhs = classify(source);
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const auto choose_source = state.builder.AllocateId();
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state.builder.AddFunction(max_value ? spv::OpUGreaterThan : spv::OpULessThanEqual,
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TypeBool(state), choose_source, rhs.key, lhs.key);
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// Keep original bits: ordering denorms does not flush the selected operand.
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auto result = EmitSelectValueU32(state, choose_source, source, old);
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result = EmitSelectValueU32(state, lhs.nan, source, result);
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result = EmitSelectValueU32(state, rhs.nan, old, result);
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result = EmitSelectValueU32(state, rhs.signaling_nan,
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EmitOrU32(state, source, ConstantU32(state, 0x00400000u)), result);
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return EmitSelectValueU32(state, lhs.signaling_nan,
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EmitOrU32(state, old, ConstantU32(state, 0x00400000u)), result);
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}
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uint32_t EmitDsSwizzleTargetLane(EmitterState& state, uint32_t subid, uint32_t control) {
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if ((control & 0xc000u) == 0xc000u) {
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const uint32_t mask = control & 0x1fu;
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@@ -689,9 +689,7 @@ void EmitProgram(EmitterState& state) {
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DefineBvhIntersect(state);
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for (const auto* block: program.blocks) {
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if (std::ranges::any_of(*block, [](const IR::Inst& inst) {
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return inst.GetOpcode() == IR::ValueOpcode::SwizzleU32 ||
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inst.GetOpcode() == IR::ValueOpcode::SharedAtomicFMin32 ||
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inst.GetOpcode() == IR::ValueOpcode::SharedAtomicFMax32;
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return inst.GetOpcode() == IR::ValueOpcode::SwizzleU32;
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})) {
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ctx.scratch_u32_variable = state.builder.AllocateId();
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if (state.lane_count == 2) {
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@@ -205,9 +205,9 @@ uint32_t DsSourceCount(Opcode opcode) {
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case Opcode::DS_WRITE2ST64_B32:
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case Opcode::DS_WRITE2_B64:
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case Opcode::DS_WRITE2ST64_B64:
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case Opcode::DS_MSKOR_B32:
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case Opcode::DS_MSKOR_B32: return 3u;
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case Opcode::DS_MIN_F32:
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case Opcode::DS_MAX_F32: return 3u;
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case Opcode::DS_MAX_F32:
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case Opcode::DS_PERMUTE_B32:
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case Opcode::DS_BPERMUTE_B32: return 2u;
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case Opcode::DS_READ_ADDTID_B32:
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@@ -280,8 +280,8 @@ VALUE_OPCODE(WriteSharedU32, Void, U32, U32, U1)
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VALUE_OPCODE(WriteSharedU32x2, Void, U32, U32, U32, U1)
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VALUE_OPCODE(WriteSharedU32x3, Void, U32, U32, U32, U32, U1)
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VALUE_OPCODE(WriteSharedU32x4, Void, U32, U32, U32, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicFMin32, Void, U32, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicFMax32, Void, U32, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicFMin32, Void, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicFMax32, Void, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicSwap32, U32, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicIAdd32, U32, U32, U32, U1)
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VALUE_OPCODE(SharedAtomicIAdd64, Void, U32, U64, U1)
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@@ -30338,7 +30338,7 @@ TestCase DsMiscVariants() {
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return test;
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}
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TestCase DsFloatMinMaxUsesSeparateCompareOperand() {
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TestCase DsFloatMinMaxIgnoresData1() {
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using O = ShaderOpcode;
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std::vector<u32> code;
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@@ -30366,10 +30366,10 @@ TestCase DsFloatMinMaxUsesSeparateCompareOperand() {
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AppendEnd(&code);
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TestCase test;
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test.name = "DsFloatMinMaxUsesSeparateCompareOperand";
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test.name = "DsFloatMinMaxIgnoresData1";
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test.code = code;
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test.initial = std::vector<u32>(2, 0);
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test.expected = {0x41100000u, 0x3f800000u};
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test.expected = {0x40800000u, 0x40800000u};
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test.opcodes = {O::V_MOV_B32, O::DS_WRITE_B32, O::DS_MIN_F32,
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O::DS_MAX_F32, O::DS_READ_B32, O::BUFFER_STORE_DWORD,
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O::S_ENDPGM};
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@@ -30380,6 +30380,100 @@ TestCase DsFloatMinMaxUsesSeparateCompareOperand() {
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return test;
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}
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TestCase DsFloatMinMaxClasses(bool gds) {
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using O = ShaderOpcode;
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// Rows are memory, columns source: -inf, -normal, -denorm, -0, +0,
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// +denorm, +normal, +inf, qNaN, sNaN. O/N select old/new; Q/R quiet them.
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constexpr std::string_view minimum[] = {
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"OOOOOOOOOR", "NNOOOOOOOR", "NNNNOOOOOR", "NNNOOOOOOR", "NNNNOOOOOR",
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"NNNNNNOOOR", "NNNNNNOOOR", "NNNNNNNOOR", "NNNNNNNNOR", "QQQQQQQQQQ"};
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constexpr std::string_view maximum[] = {
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"ONNNNNNNOR", "OONNNNNNOR", "OOOONNNNOR", "OOOONNNNOR", "OOOOONNNOR",
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"OOOOOONNOR", "OOOOOONNOR", "OOOOOOOOOR", "NNNNNNNNOR", "QQQQQQQQQQ"};
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constexpr u32 old_values[] = {
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0xff800000u, 0xc0000000u, 0x80000100u, 0x80000000u, 0u,
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0x00000100u, 0x40000000u, 0x7f800000u, 0x7fc12345u, 0x7f812345u};
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constexpr u32 sources[] = {
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0xff800000u, 0xc0400000u, 0x80000001u, 0x80000000u, 0u,
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0x00000001u, 0x40400000u, 0x7f800000u, 0xffc54321u, 0xff854321u};
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const auto select = [](char choice, u32 old, u32 source) {
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const u32 bits = choice == 'O' || choice == 'Q' ? old : source;
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return choice == 'Q' || choice == 'R' ? bits | 0x00400000u : bits;
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};
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TestCase test;
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test.name = gds ? "DsFloatMinMaxGdsClasses" : "DsFloatMinMaxLdsClasses";
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for (u32 row = 0; row < std::size(old_values); ++row) {
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for (u32 column = 0; column < std::size(sources); ++column) {
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const auto old = old_values[row];
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const auto source = sources[column];
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test.initial.insert(test.initial.end(), {old, source, 0u, 0u});
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test.expected.insert(test.expected.end(),
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{old, source, select(minimum[row][column], old, source),
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select(maximum[row][column], old, source)});
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}
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}
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// Reversing positive denorm magnitudes still selects source for min and old for max.
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test.initial.insert(test.initial.end(), {1u, 0x100u, 0u, 0u});
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test.expected.insert(test.expected.end(), {1u, 0x100u, 0x100u, 1u});
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const auto count = static_cast<u32>(test.initial.size() / 4u);
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auto &code = test.code;
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code.push_back(EncodeVop2(0x1a, 1, InlineU32(3), 0));
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code.push_back(EncodeVop2(0x1a, 8, InlineU32(4), 0));
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code.push_back(EncodeMubuf0(0x0d));
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code.push_back(EncodeMubuf1(2, 0, 8));
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for (u32 offset : {0u, 4u}) {
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code.push_back(EncodeDs0(0x0d, offset, gds));
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code.push_back(EncodeDs1(0, 2, 1));
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}
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code.push_back(EncodeDs0(0x12, 0, gds));
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code.push_back(EncodeDs1Ex(0, 250, 3, 1)); // DATA1 is unused and uninitialized.
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code.push_back(EncodeDs0(0x13, 4, gds));
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code.push_back(EncodeDs1Ex(0, 251, 3, 1));
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AppendVMovLiteral(&code, 6, 0xff800000u);
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AppendVMovLiteral(&code, 7, 0x7f800000u);
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code.push_back(EncodeSop1(0x04, 4, 126));
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code.push_back(EncodeSop1(0x04, 126, InlineU32(0)));
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// Inactive updates must leave the table results untouched.
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code.push_back(EncodeDs0(0x12, 0, gds));
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code.push_back(EncodeDs1(0, 6, 1));
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code.push_back(EncodeDs0(0x13, 4, gds));
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code.push_back(EncodeDs1(0, 7, 1));
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code.push_back(EncodeSop1(0x04, 126, 4));
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// Active accesses immediately beyond the allocation must also be discarded.
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AppendVMovU32(&code, 9, count * 8u);
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code.push_back(EncodeDs0(0x12, 0, gds));
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code.push_back(EncodeDs1(0, 6, 9));
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code.push_back(EncodeDs0(0x13, 0, gds));
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code.push_back(EncodeDs1(0, 7, 9));
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for (u32 component = 0; component < 2u; ++component) {
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code.push_back(EncodeDs0(0x36, component * 4u, gds));
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code.push_back(EncodeDs1(4u + component, 0, 1));
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}
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code.push_back(EncodeMubuf0(0x1d, 8));
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code.push_back(EncodeMubuf1(4, 12, 8));
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AppendEnd(&code);
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test.compute_info.threads_num[0] = count;
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test.compute_info.threads_num[1] = 1;
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test.compute_info.threads_num[2] = 1;
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test.compute_info.thread_ids_num = 1;
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test.compute_info.lds_size_dwords = count * 2u;
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test.has_compute_info = true;
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test.opcodes = {O::V_MOV_B32, O::V_LSHLREV_B32, O::S_MOV_B64,
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O::BUFFER_LOAD_DWORDX2, O::DS_WRITE_B32, O::DS_MIN_F32,
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O::DS_MAX_F32, O::DS_READ_B32, O::BUFFER_STORE_DWORDX2,
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O::S_ENDPGM};
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test.required_spirv = {"OpAtomicLoad", "OpAtomicCompareExchange", "OpLoopMerge"};
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test.forbidden_spirv = {"OpFOrdLessThan", "OpFOrdGreaterThan"};
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if (gds) {
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test.gds_initial.resize(count * 2u);
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for (u32 i = 0; i < count; ++i) {
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test.expected_gds.push_back(test.expected[i * 4u + 2u]);
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test.expected_gds.push_back(test.expected[i * 4u + 3u]);
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}
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}
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return test;
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}
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TestCase DsSwizzleInvalidSourceLaneZero() {
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using O = ShaderOpcode;
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@@ -34528,7 +34622,9 @@ std::vector<TestCase> MakeCases() {
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}
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}
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AddCase(DsMiscVariants);
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AddCase(DsFloatMinMaxUsesSeparateCompareOperand);
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AddCase(DsFloatMinMaxIgnoresData1);
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AddCase([] { return DsFloatMinMaxClasses(false); });
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AddCase([] { return DsFloatMinMaxClasses(true); });
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AddCase(DsSwizzleInvalidSourceLaneZero);
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AddCase(DsPermuteCapturedExecOffsetAndWrap);
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AddCase(DsPermuteWave64UsesIndependentHalves);
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+13
-34
@@ -7741,40 +7741,18 @@ void TestNewShaderRecompilerDsAddtidTranslation() {
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CheckSpirvBinaryValidates(result.spirv);
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}
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void TestNewShaderRecompilerDsFloatMinMaxTranslation() {
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const uint32_t shader[] = {
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EncodeDs0(0x12, 4), EncodeDs1Ex(0, 9, 7, 1), // ds_min_f32 v7, v9, v1
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EncodeDs0(0x13, 8), EncodeDs1Ex(0, 10, 8, 1), // ds_max_f32 v8, v10, v1
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0xbf810000u,
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};
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auto options = MakeCompileOptions(ShaderType::Compute);
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options.dump_ir = true;
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auto result = RecompileForTest(shader, options);
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Check((result.decoded_dump.find("ds_min_f32") != std::string::npos),
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"new decoder did not decode DS float min");
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Check((result.decoded_dump.find("ds_max_f32") != std::string::npos),
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"new decoder did not decode DS float max");
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Check((result.ir_dump.find("DsMinF32 null, v7, v1") != std::string::npos),
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"DS float min did not lower to explicit IR");
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Check((result.ir_dump.find("DsMaxF32 null, v8, v1") != std::string::npos),
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"DS float max did not lower to explicit IR");
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Check((result.ir_dump.find("v9") != std::string::npos),
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"DS float min did not retain DATA1 compare operand");
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Check((result.ir_dump.find("v10") != std::string::npos),
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"DS float max did not retain DATA1 compare operand");
|
||||
Check(SpirvContainsOpcode(result.spirv, 12),
|
||||
"SPIR-V binary does not contain OpExtInst");
|
||||
Check(SpirvContainsOpcode(result.spirv, 61),
|
||||
"SPIR-V binary does not contain OpLoad");
|
||||
Check(SpirvContainsOpcode(result.spirv, 62),
|
||||
"SPIR-V binary does not contain OpStore");
|
||||
Check(SpirvContainsOpcode(result.spirv, 65),
|
||||
"SPIR-V binary does not contain OpAccessChain");
|
||||
Check(SpirvContainsOpcode(result.spirv, 124),
|
||||
"SPIR-V binary does not contain OpBitcast");
|
||||
CheckSpirvBinaryValidates(result.spirv);
|
||||
void TestDsFloatMinMaxDecoder() {
|
||||
using namespace ShaderRecompiler::Decoder;
|
||||
for (bool max_value : {false, true}) {
|
||||
const uint32_t shader[] = {
|
||||
EncodeDs0(max_value ? 0x13 : 0x12, 4), EncodeDs1Ex(0, 250, 7, 1)};
|
||||
Instruction decoded;
|
||||
DecodeInstruction(shader, 0u, decoded);
|
||||
Check(decoded.opcode == (max_value ? Opcode::DS_MAX_F32 : Opcode::DS_MIN_F32) &&
|
||||
decoded.src_count == 2u && decoded.src0.reg == 1u &&
|
||||
decoded.src1.reg == 7u && decoded.offset == 4u,
|
||||
"DS float min/max must read only address and DATA0");
|
||||
}
|
||||
}
|
||||
|
||||
void TestNewShaderRecompilerCfgStraightLine() {
|
||||
@@ -14805,6 +14783,7 @@ int main() {
|
||||
// here.
|
||||
TestScalarAshrI64Decoder();
|
||||
TestImageAtomicWidthDecoder();
|
||||
TestDsFloatMinMaxDecoder();
|
||||
TestNewShaderDecoderArchitecture();
|
||||
TestImageAddressOperands();
|
||||
TestSopkCompareImmediateExtension();
|
||||
|
||||
Reference in New Issue
Block a user