2f4b8a335d
shader: allow SDWA byte destinations for bitwise VOP2 ops
2026-10-08 22:12:05 +04:00
9f25e3c23e
shader: support partial SDWA multiply and byte-source moves
2026-10-08 01:10:49 +04:00
7881c69a54
shader: decode v_cmp_class_f16
2026-10-08 01:10:49 +04:00
9e666e4dd2
shader: support scalar byte sign extension
2026-10-08 01:10:49 +04:00
5297abb7ac
shader: run non-amplifying NGG programs in mesh workgroups
2026-10-07 21:17:35 +04:00
3ba6ebae81
shader: initialize perspective sample barycentrics at SampleId
2026-10-07 20:44:46 +04:00
96eb681b90
shader: add V_MIN3_U16 opcode
2026-10-07 16:22:30 +04:00
26cce9909a
shader: add BUFFER_LOAD_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
5af370c257
shader: add BUFFER_STORE_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
bb98f26433
shader: add missing I64/U64 compare variants
2026-10-07 05:03:09 +04:00
7492cb9577
shader: emulate DS_ORDERED_COUNT as a GDS atomic ( #1117 )
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* feat(shader): emulate DS_ORDERED_COUNT as a GDS atomic
* fix(shader): issue one ordered-count atomic per wave
* shader: correct ordered-count addressing and wave results
Use the M0 base and pixel packer offset for the GDS counter. Broadcast the
previous value to every lane and preserve the counter when EXEC is empty.
Add GPU regressions for add/exchange with full, partial, and empty EXEC in
wave32 and wave64. The targeted DS and buffer atomic suite passes 63 cases.
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-07 01:45:37 +04:00
60e53a39cc
decoder: accept clamp on V_MIN3/MAX3/MED3_F16 ( #1116 )
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fix(decoder): accept clamp on V_MIN3/MAX3/MED3_F16
2026-10-07 01:24:18 +04:00
1195af2510
decoder: add V_CMPX_U_F32 ( #1120 )
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feat(decoder): add V_CMPX_U_F32
2026-10-07 01:16:23 +04:00
5601861d67
shader: implement RDNA2 scalar 16-bit sign extension
2026-10-06 14:53:17 +04:00
9caec9f2c8
shader: preserve RDNA2 DLC coherence for flat address loads
2026-10-06 14:53:17 +04:00
5b826c6e4a
shader: emit native 64-bit operations where compatible
2026-10-05 20:41:03 +04:00
7a0e1dafd7
shader: classify native half values with shared operand decoding
2026-10-05 18:39:31 +04:00
1d41ddb378
shader: allow RDNA2 SDWA partial destinations for i24 multiply
2026-10-05 18:39:31 +04:00
1d55272467
shader: support V_CMPX_NE_U16
2026-10-05 09:25:19 +04:00
2b1b7ed0e4
shader: FLAT opcode=0x24
2026-10-05 08:48:20 +04:00
af3011cd69
shader: add missing 64-bit integer image atomics
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:12:06 +04:00
e85279ea7b
shader: correct DS float min/max operands and special values
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
d8be245c22
shader: separate legacy FP32 MAD rounding from fused FMA
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
b27b89f513
shader: fix VOP2 DPP8 decoding
2026-10-05 02:24:51 +04:00
8274e517b2
shader: add FP64 min, max and rounding
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
98557a83b6
shader: implement RDNA2 DS masked OR through shared atomic updates
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
efbaa17f71
shader: preserve raw EXEC and VCC bits in 64-bit scalar selects
2026-10-04 18:39:34 +04:00
dbf66b7f4f
shader: support RDNA2 BVH64 ray intersections with shared traversal
2026-10-04 18:39:34 +04:00
c17fa5b936
shader: implement RDNA2 DS forward lane permute
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
b8946fef94
shader: translate RDNA2 signed 64-bit not-equal comparisons
2026-10-04 18:39:34 +04:00
f18679e0cd
shader: mask ALIGNBYTE offsets to the two-bit selector
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
284d58d1d5
shader: implement RDNA2 double-precision fractional part
2026-10-04 18:39:34 +04:00
d890bb190c
shader: decode RDNA2 bit-reverse SDWA source selectors
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
e4aca7a60b
shader: initialize EXEC from requested dispatch thread extents
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
2026-10-04 18:39:34 +04:00
f58014ff0e
shader: preserve wave-wide vector-store completion before publication
2026-10-04 18:39:34 +04:00
bd611bfe15
Honor explicit gather LOD with shared image mip selection
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Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com >
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-03 14:19:33 +04:00
ef4c5baf3a
Implement RDNA2 64-bit image atomic maximum
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-03 14:19:32 +04:00
b3e419ff11
shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP ( #952 )
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* shader: implement 32-bit RDNA2 image atomic compare-and-swap
* shader: share atomic emission and correct image barriers
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-02 01:15:53 +04:00
0d0b215fab
shader: port 64-bit ALU and atomic opcodes
2026-10-02 00:51:15 +04:00
11001c97f7
shader: add distinct mesh shader type
2026-10-02 00:51:15 +04:00
337f432016
shader: execute PS5 BVH intersections and local FLAT stacks
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Jean-Philippe <github@meunier.jp >
2026-10-02 00:51:15 +04:00
581dad7dd3
shader: implement RDNA2 FP64 equality comparisons
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Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-02 00:51:15 +04:00
64dcbe0ea1
shader: decode the combined conditional-debug branch
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Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com >
2026-10-02 00:51:15 +04:00
bc193f5272
shader: V_CMPX_LT_I16 + fix SDWA with SEXT
2026-09-30 20:49:20 +04:00
6799ecbc5b
shader: add native 64-bit LDS OR with shared typed storage views
2026-09-29 19:13:33 +04:00
35c4dca2ce
shader: add V_CMPX_NLE_F16 opcode
2026-09-29 19:13:33 +04:00
0a5774be7b
shader: support FP64 conversions used by FighterZ ( #884 )
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shader: support float and unsigned widening to FP64
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-28 17:39:31 +04:00
0791f921f6
UFC 5 in-game ( #883 )
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* shader: release descriptor dependencies
* shader: simplify shared-exit control flow
* shader: fix scalar memory loads
* shader: fix LDS counter bounds
* renderer: skip inactive pixel shaders
* shader: respect FP32 mode in comparisons
* renderer: fix sampler border colors
* shader: resolve descriptors from control flow
* shader: resolve descriptors before resource planning
* shader: handle scalar guards for image bounds
* shader: handle reduced guards for image loops
* shader: fix wave guards and material indices
* shader: preserve scalar buffer offset alignment and carry
* shader: prove masked loop bounds across iteration transitions
* shader: preserve source and IR before resource tracking failures
* shader: track material keys selected from active lanes
* shader: remove obsolete post-dominator analysis
* shader: follow bounds guards through control-flow joins
2026-09-28 16:03:05 +04:00
bec67b7863
Fix HITMAN 3 boot, layered presentation, and socket imports ( #851 )
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* videoout: synchronize layered flips with premultiplied composition
* shader: support unsigned FFBH subword sources
* shader: apply cube-face result scaling
* shader: prune buffer reads proven out of bounds
* net: implement send and receive exports with shared socket handling
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-27 02:13:30 +04:00
16b83a034c
Shader: execute RDNA2 FP64 shadow arithmetic and log denorm limits
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Shader: disable FP64 denorm preservation controls for now
2026-09-26 15:15:35 +04:00
Mac