frans
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bd611bfe15
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Honor explicit gather LOD with shared image mip selection
Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com>
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
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2026-10-03 14:19:33 +04:00 |
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Senaxx
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0d0b215fab
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shader: port 64-bit ALU and atomic opcodes
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2026-10-02 00:51:15 +04:00 |
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nmzik
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337f432016
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shader: execute PS5 BVH intersections and local FLAT stacks
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Jean-Philippe <github@meunier.jp>
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2026-10-02 00:51:15 +04:00 |
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nmzik
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6799ecbc5b
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shader: add native 64-bit LDS OR with shared typed storage views
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2026-09-29 19:13:33 +04:00 |
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nmzik
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0791f921f6
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UFC 5 in-game (#883)
* shader: release descriptor dependencies
* shader: simplify shared-exit control flow
* shader: fix scalar memory loads
* shader: fix LDS counter bounds
* renderer: skip inactive pixel shaders
* shader: respect FP32 mode in comparisons
* renderer: fix sampler border colors
* shader: resolve descriptors from control flow
* shader: resolve descriptors before resource planning
* shader: handle scalar guards for image bounds
* shader: handle reduced guards for image loops
* shader: fix wave guards and material indices
* shader: preserve scalar buffer offset alignment and carry
* shader: prove masked loop bounds across iteration transitions
* shader: preserve source and IR before resource tracking failures
* shader: track material keys selected from active lanes
* shader: remove obsolete post-dominator analysis
* shader: follow bounds guards through control-flow joins
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2026-09-28 16:03:05 +04:00 |
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Pcniado
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bec67b7863
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Fix HITMAN 3 boot, layered presentation, and socket imports (#851)
* videoout: synchronize layered flips with premultiplied composition
* shader: support unsigned FFBH subword sources
* shader: apply cube-face result scaling
* shader: prune buffer reads proven out of bounds
* net: implement send and receive exports with shared socket handling
---------
Co-authored-by: nmzik <Nmzik@mail.ru>
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2026-09-27 02:13:30 +04:00 |
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nmzik
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16b83a034c
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Shader: execute RDNA2 FP64 shadow arithmetic and log denorm limits
Shader: disable FP64 denorm preservation controls for now
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2026-09-26 15:15:35 +04:00 |
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nmzik
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dc9280d75d
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shader: add GLC/DLC buffer cache policy support
Co-authored-by: Mac <me@itsmemac.com>
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2026-09-24 20:46:04 +04:00 |
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nmzik
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b2a80a3a96
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Resolve GPU-selected raw buffer descriptors through shared RDNA2 addressing
Co-authored-by: Bipin <87369440+bipinkrish@users.noreply.github.com>
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2026-09-22 11:38:50 +04:00 |
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nmzik
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7516068662
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gpu: compile RDNA2 tessellation through native LS HS and TES stages
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2026-09-14 06:58:32 +04:00 |
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nmzik
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2d37634ee9
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shader: construct SPIR-V module variables in one place
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2026-09-12 13:42:15 +04:00 |
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nmzik
|
1d1f00bdef
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shader: use Khronos definitions and simplify compiler ownership
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2026-09-12 13:42:15 +04:00 |
|
nmzik
|
2b3993a595
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shader: share emitter helpers
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2026-09-08 21:26:59 +04:00 |
|
nmzik
|
cd62693792
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shader: share control flow labels
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2026-09-08 21:26:59 +04:00 |
|
nmzik
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3213934d42
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shader: run merged geometry stages as mesh shaders
Co-authored-by: Brandon Strong <brandostrong@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
|
2026-09-05 08:32:23 +04:00 |
|
nmzik
|
b3c8f91a84
|
graphics: implement RDNA2 buffer atomic swap x2
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2026-09-03 10:17:04 +02:00 |
|
nmzik
|
858c18468b
|
graphics: implement RDNA2 buffer atomic OR x2
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2026-09-03 05:39:05 +02:00 |
|
nmzik
|
98200fed19
|
shader: rework resource specialization and optimize pipeline caching
|
2026-09-03 03:04:17 +02:00 |
|
nmzik
|
af8aecfdde
|
shader: remove recompiler error-string propagation
|
2026-08-31 05:31:41 +04:00 |
|
nmzik
|
5bd447d2a2
|
shader: implement DS_BPERMUTE_B32
Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com>
|
2026-08-29 19:23:19 +04:00 |
|
nmzik
|
e738535294
|
graphics: add RDNA2 FLAT BDA buffer cache and faults
|
2026-08-27 03:45:41 +02:00 |
|
nmzik
|
ffa69d48de
|
shader: remove second IR layer
|
2026-08-26 08:49:39 +02:00 |
|
nmzik
|
bad6726f5e
|
Rewrite descriptor bindings and unify graphics push constants
|
2026-08-21 22:28:10 +02:00 |
|
nmzik
|
49ea1680f8
|
graphics: use per-invocation shader masks
|
2026-08-21 08:03:22 +02:00 |
|
nmzik
|
d0a4c908a1
|
shader: align address-memory buffer bindings
|
2026-08-21 03:32:49 +02:00 |
|
Senaxx
|
56a15c2036
|
Implement RDNA2 per-invocation scratch memory
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
85cf965d54
|
refactor(shader): centralize typed resource metadata
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
c236ba713d
|
refactor(shader): preserve native wide shared operations
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
3ea2099245
|
refactor(shader): simplify buffer access emission
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
d34e30d892
|
refactor(shader): emit SPIR-V declarations on demand
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
e1bcc298a0
|
refactor(shader): remove register-state compatibility paths
|
2026-08-21 03:32:47 +02:00 |
|
Senaxx
|
7e42513faf
|
perf(shader): cache analysis (#259)
perf(shader): cache SPIR-V requirement analysis
Co-authored-by: nmzik <Nmzik@mail.ru>
|
2026-08-19 00:50:13 +02:00 |
|
nmzik
|
5970c4ef95
|
shader_recompiler: remove legacy SPIR-V emitter
|
2026-08-18 03:53:44 +02:00 |
|
nmzik
|
e7c8bcb3a4
|
recompiler: deduplication cleanup
|
2026-08-18 03:53:44 +02:00 |
|
nmzik
|
0f3540b1ff
|
shader: unify stage input metadata
|
2026-08-18 03:53:44 +02:00 |
|
nmzik
|
430de9bd15
|
graphics: support dynamic indirect image tables
|
2026-08-18 03:53:43 +02:00 |
|
Senaxx
|
980d89f739
|
graphics: support dynamic storage mip writes
|
2026-08-18 03:53:43 +02:00 |
|
nmzik
|
b42380ced6
|
shader_recompiler: add SSA
|
2026-08-18 03:53:41 +02:00 |
|