nmzik
5b68a26cce
shader: keep scalar payload and terminal conditions on the GPU
2026-10-09 15:06:39 +00:00
nmzik
3b1a94707a
shader: capture only memory-dependent resource predicates
2026-10-09 15:06:39 +00:00
nmzik
488c0acae9
shader: resolve writable descriptors selected by immutable branches
2026-10-09 15:06:39 +00:00
nmzik
a31e2cd361
shader: BUFFER_LOAD_SHORT_D16_HI
2026-10-09 12:57:04 +02:00
nmzik
1bd282ec0a
shader: BUFFER_LOAD_SHORT_D16
2026-10-09 12:57:04 +02:00
nmzik
1fc520cd62
shader: FLAT_STORE_DWORD
2026-10-09 12:57:04 +02:00
nmzik
7b9997baea
shader: fold exact float class masks into native NaN predicates
2026-10-09 02:54:21 +02:00
nmzik
393257eaae
shader: classify float NaNs with one magnitude comparison
2026-10-09 02:54:21 +02:00
nmzik
13e3ca314c
shader: unpack buffer offsets from one load per packed word
2026-10-09 02:54:21 +02:00
nmzik
b4853a0e08
shader: preserve export vectors instead of rebuilding scalar components
2026-10-09 02:54:21 +02:00
nmzik
ee4dd90649
shader: emit native integer operations and remove signedness casts
2026-10-09 02:54:21 +02:00
nmzik
3df456675d
shader: own control flow on IR blocks with direct targets
2026-10-09 01:59:41 +02:00
nmzik
8abf99c56e
shader: emit bounded SPIR-V operands without temporary vectors
2026-10-09 01:58:39 +02:00
nmzik
7c6121cba5
shader: build CFG labels and targets from ordered storage
2026-10-09 01:55:50 +02:00
nmzik
46997dfc7a
shader: retain resource type IDs in SPIR-V emission state
2026-10-09 01:55:50 +02:00
nmzik
dbe5353f3a
shader: eliminate retained SRT lookup aliases
2026-10-09 01:44:34 +02:00
nmzik
e1ac893a0c
shader: collect usage once and emit descriptor slots directly
2026-10-09 02:17:38 +04:00
nmzik
b35cdc39b7
shader: append deferred Phi operands directly to SPIR-V storage
2026-10-09 01:40:52 +04:00
nmzik
52dbc724f8
shader: store SPIR-V definitions directly in IR nodes
2026-10-09 01:40:41 +04:00
Mac
2f4b8a335d
shader: allow SDWA byte destinations for bitwise VOP2 ops
2026-10-08 22:12:05 +04:00
nmzik
b38b7454a6
Preserve vertex export locations for mixed pixel interpolation
2026-10-08 22:05:53 +04:00
shadowbeat070
9f25e3c23e
shader: support partial SDWA multiply and byte-source moves
2026-10-08 01:10:49 +04:00
shadowbeat070
7881c69a54
shader: decode v_cmp_class_f16
2026-10-08 01:10:49 +04:00
shadowbeat070
9e666e4dd2
shader: support scalar byte sign extension
2026-10-08 01:10:49 +04:00
nmzik
190f838ea4
shader: preserve workgroup bounds for scalar image descriptor tables
2026-10-07 21:25:53 +04:00
Claxten
5297abb7ac
shader: run non-amplifying NGG programs in mesh workgroups
2026-10-07 21:17:35 +04:00
Claxten
a8beac190f
shader: evaluate scalar branch decisions across the complete guest wave
2026-10-07 21:17:35 +04:00
Claxten
b96871e2bf
shader: unpack compressed SNORM16 color exports as normalized signed values
2026-10-07 21:17:35 +04:00
Claxten
21a1346e27
graphics: route compact color exports through CB_SHADER_MASK
2026-10-07 21:17:35 +04:00
Claxten
3ba6ebae81
shader: initialize perspective sample barycentrics at SampleId
2026-10-07 20:44:46 +04:00
nmzik
96eb681b90
shader: add V_MIN3_U16 opcode
2026-10-07 16:22:30 +04:00
nmzik
26cce9909a
shader: add BUFFER_LOAD_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
nmzik
5af370c257
shader: add BUFFER_STORE_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
nmzik
bb98f26433
shader: add missing I64/U64 compare variants
2026-10-07 05:03:09 +04:00
NeySlim
7492cb9577
shader: emulate DS_ORDERED_COUNT as a GDS atomic ( #1117 )
...
* feat(shader): emulate DS_ORDERED_COUNT as a GDS atomic
* fix(shader): issue one ordered-count atomic per wave
* shader: correct ordered-count addressing and wave results
Use the M0 base and pixel packer offset for the GDS counter. Broadcast the
previous value to every lane and preserve the counter when EXEC is empty.
Add GPU regressions for add/exchange with full, partial, and empty EXEC in
wave32 and wave64. The targeted DS and buffer atomic suite passes 63 cases.
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-07 01:45:37 +04:00
NeySlim
60e53a39cc
decoder: accept clamp on V_MIN3/MAX3/MED3_F16 ( #1116 )
...
fix(decoder): accept clamp on V_MIN3/MAX3/MED3_F16
2026-10-07 01:24:18 +04:00
NeySlim
1195af2510
decoder: add V_CMPX_U_F32 ( #1120 )
...
feat(decoder): add V_CMPX_U_F32
2026-10-07 01:16:23 +04:00
nmzik
b929bbe3e0
shader: limit broad image tables to compatible views
2026-10-06 14:59:05 +04:00
nmzik
ae1e92621d
shader: sample mixed bindless images through contiguous native arrays
2026-10-06 14:53:17 +04:00
nmzik
5a491abbda
shader: remove redundant descriptor sorting and stale null check
2026-10-06 14:53:17 +04:00
Claxten
5601861d67
shader: implement RDNA2 scalar 16-bit sign extension
2026-10-06 14:53:17 +04:00
Claxten
cd06601022
shader: replace CPU selector chains with direct image-table lookup
2026-10-06 14:53:17 +04:00
nmzik
c23de62184
shader: resolve nested descriptor selector tables with exact scalar offsets
2026-10-06 14:53:17 +04:00
Claxten
9caec9f2c8
shader: preserve RDNA2 DLC coherence for flat address loads
2026-10-06 14:53:17 +04:00
nmzik
5b826c6e4a
shader: emit native 64-bit operations where compatible
2026-10-05 20:41:03 +04:00
nmzik
77d7722173
shader: disable explicit MAD denormal checks for performance testing
...
Comment out the five explicit flush checks and record the substantial 3DMiniGolf menu FPS drop on NVIDIA RTX 5080 Laptop GPU. Preserve separate multiply/add rounding and both NoContraction decorations.
The matched runs used silent logging, no debugger, no Vulkan validation, and the cd9fc6ff revert on both revisions. Native denormal behavior remains GPU-dependent.
2026-10-05 18:39:31 +04:00
nmzik
266c12cec6
Revert "shader: keep scalar data native and preserve raw addresses"
...
This reverts commit cd9fc6ff2d .
2026-10-05 18:39:31 +04:00
nmzik
7a0e1dafd7
shader: classify native half values with shared operand decoding
2026-10-05 18:39:31 +04:00
nmzik
1d41ddb378
shader: allow RDNA2 SDWA partial destinations for i24 multiply
2026-10-05 18:39:31 +04:00
nmzik
5c83060481
shader: resolve masked image keys in strided descriptor records
2026-10-05 14:43:21 +04:00