Nawid3333
e93b4b0378
shader: support returning 32-bit LDS compare-exchange (DS_CMPST_RTN_B32) ( #1578 )
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* shader: support DS_CMPST_RTN_B32
Assassin's Creed Valhalla (PPSA01490, #281 ) stops on DS opcode 0x30 in a
compute shader. DS compares DATA and stores DATA2, the opposite of
BUFFER_ATOMIC_CMPSWAP, so the 32-bit atomic path swaps the two for this
opcode, as the 64-bit form does.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
* shader: reject unsupported GDS compare-store variant
---------
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-17 04:37:16 +02:00
Çağatay Güçlü
02ead0e2e1
shader: 64-bit buffer atomic add (BUFFER_ATOMIC_ADD_X2)
2026-10-17 04:09:54 +02:00
nmzik
c8caa27936
shader: preserve folded native constants for descriptor provenance
2026-10-15 23:22:30 +02:00
nmzik
dd429ef858
shader: decode high-half formatted buffer stores
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-15 22:28:00 +02:00
nmzik
bc2664cefa
shader: decode comparison gathers with explicit LOD
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-15 22:28:00 +02:00
nmzik
2f6ee0e91d
shader: support RDNA2 high-half short buffer stores
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 20:55:50 +02:00
nmzik
4843d8d942
shader: support packed D16 XYZW formatted buffer stores
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 19:35:08 +02:00
nmzik
e0586cc85a
shader: decode unsigned byte loads into preserved low halves
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 18:21:58 +02:00
nmzik
280b87adec
shader: allow reverse left shifts to use shared SDWA partial writes
2026-10-14 05:20:23 +02:00
nmzik
8d18be71db
shader: decode upper-half byte stores through shared operand selection
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 04:20:02 +02:00
nmzik
6abfe3bbe4
shader: share formatted loads and support packed D16 XYZW buffers
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 04:09:57 +02:00
nmzik
9e41d8320a
shader: support returning 64-bit LDS max and compare-exchange
2026-10-13 21:33:50 +00:00
nmzik
56738aa4e1
shader: sample packed normalized images with one bilinear gather
2026-10-13 21:27:07 +00:00
nmzik
984cfcebd1
shader: emit native texel offsets using sample execution context
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Co-authored-by: netwarex <mail@pety.me >
2026-10-11 18:53:01 +02:00
nmzik
cf77fb4353
shader: initialize NGG vertex count from active native invocations
2026-10-11 01:05:56 +02:00
Mac
679be25c37
shader: recognize remaining disabled debug branches
2026-10-10 04:31:55 +02:00
fxpw
fa56c5eae9
shader: add scalar zero-bit count and search operations
2026-10-10 04:31:55 +02:00
foufouadi
3b9e176b70
shader: support VOP1/VOP2 DPP8 fetch-inactive
2026-10-10 04:31:55 +02:00
popcoder565
2f4d0f383e
shader: add SDWA support for V_MIN_I32 ( #1342 )
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WWE 2K26 stops building a shader CFG with "unsupported family=VOP2
opcode=0x11 raw=[0x220404f9 0x00060605] reason=VOP2 SDWA modifier is not
supported for opcode".
V_MIN_I32 takes the same integer path as V_MAX_I32, so give it the same
full-destination SDWA profile. The test runs the game's encoding, which
takes the signed minimum with the zero-extended low byte of a register.
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-10 03:43:08 +02:00
TheCruZ
d247d3d60c
shader: complete signed 64-bit integer comparisons
2026-10-10 03:36:25 +02:00
nmzik
59183dbfa8
shader: add missing F64 VOPC compares
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Co-authored-by: Hector Mödinger S. <hectormodinger@gmail.com >
2026-10-09 21:01:51 +02:00
nmzik
3e9f88bf79
shader: isolate SWAPPC work from ordinary shader paths
2026-10-09 17:27:07 +02:00
nmzik
bb5edbd490
shader: expose graphics compute queue fields to GETREG
2026-10-09 15:06:39 +00:00
nmzik
1818aae562
shader: link scalar leaf calls only for SWAPPC programs
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Co-authored-by: Behzad <behzadkhan1736@gmail.com >
2026-10-09 15:06:39 +00:00
nmzik
a31e2cd361
shader: BUFFER_LOAD_SHORT_D16_HI
2026-10-09 12:57:04 +02:00
nmzik
1bd282ec0a
shader: BUFFER_LOAD_SHORT_D16
2026-10-09 12:57:04 +02:00
nmzik
1fc520cd62
shader: FLAT_STORE_DWORD
2026-10-09 12:57:04 +02:00
nmzik
3df456675d
shader: own control flow on IR blocks with direct targets
2026-10-09 01:59:41 +02:00
nmzik
7c6121cba5
shader: build CFG labels and targets from ordered storage
2026-10-09 01:55:50 +02:00
Mac
2f4b8a335d
shader: allow SDWA byte destinations for bitwise VOP2 ops
2026-10-08 22:12:05 +04:00
shadowbeat070
9f25e3c23e
shader: support partial SDWA multiply and byte-source moves
2026-10-08 01:10:49 +04:00
shadowbeat070
7881c69a54
shader: decode v_cmp_class_f16
2026-10-08 01:10:49 +04:00
shadowbeat070
9e666e4dd2
shader: support scalar byte sign extension
2026-10-08 01:10:49 +04:00
Claxten
5297abb7ac
shader: run non-amplifying NGG programs in mesh workgroups
2026-10-07 21:17:35 +04:00
Claxten
3ba6ebae81
shader: initialize perspective sample barycentrics at SampleId
2026-10-07 20:44:46 +04:00
nmzik
96eb681b90
shader: add V_MIN3_U16 opcode
2026-10-07 16:22:30 +04:00
nmzik
26cce9909a
shader: add BUFFER_LOAD_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
nmzik
5af370c257
shader: add BUFFER_STORE_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
nmzik
bb98f26433
shader: add missing I64/U64 compare variants
2026-10-07 05:03:09 +04:00
NeySlim
7492cb9577
shader: emulate DS_ORDERED_COUNT as a GDS atomic ( #1117 )
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* feat(shader): emulate DS_ORDERED_COUNT as a GDS atomic
* fix(shader): issue one ordered-count atomic per wave
* shader: correct ordered-count addressing and wave results
Use the M0 base and pixel packer offset for the GDS counter. Broadcast the
previous value to every lane and preserve the counter when EXEC is empty.
Add GPU regressions for add/exchange with full, partial, and empty EXEC in
wave32 and wave64. The targeted DS and buffer atomic suite passes 63 cases.
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-07 01:45:37 +04:00
NeySlim
60e53a39cc
decoder: accept clamp on V_MIN3/MAX3/MED3_F16 ( #1116 )
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fix(decoder): accept clamp on V_MIN3/MAX3/MED3_F16
2026-10-07 01:24:18 +04:00
NeySlim
1195af2510
decoder: add V_CMPX_U_F32 ( #1120 )
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feat(decoder): add V_CMPX_U_F32
2026-10-07 01:16:23 +04:00
Claxten
5601861d67
shader: implement RDNA2 scalar 16-bit sign extension
2026-10-06 14:53:17 +04:00
Claxten
9caec9f2c8
shader: preserve RDNA2 DLC coherence for flat address loads
2026-10-06 14:53:17 +04:00
nmzik
5b826c6e4a
shader: emit native 64-bit operations where compatible
2026-10-05 20:41:03 +04:00
nmzik
7a0e1dafd7
shader: classify native half values with shared operand decoding
2026-10-05 18:39:31 +04:00
nmzik
1d41ddb378
shader: allow RDNA2 SDWA partial destinations for i24 multiply
2026-10-05 18:39:31 +04:00
fxpw
1d55272467
shader: support V_CMPX_NE_U16
2026-10-05 09:25:19 +04:00
nmzik
2b1b7ed0e4
shader: FLAT opcode=0x24
2026-10-05 08:48:20 +04:00
nmzik
af3011cd69
shader: add missing 64-bit integer image atomics
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:12:06 +04:00