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f0e462a8a2518dd672f678b3fbc86be93224ee67
Commit Graph

221 Commits

Author SHA1 Message Date
Mr. Big Britches f0e462a8a2 shader: allocate split-wave dispatcher spill IDs in program order 2026-10-20 15:21:19 +02:00
Mr. Big Britches feed075a9f gpu: implement PA_CL_UCP user clip planes through draw push constants 2026-10-20 15:21:19 +02:00
nmzik f186b35706 shader: drop null checks on the stage input info pointers 2026-10-20 03:22:40 +02:00
0xcrstn fa8216c4d9 shader: size per-thread LDS emulation by the guest LDS allocation 2026-10-20 02:51:27 +02:00
nmzik defb2f11d3 Share median classifications and preserve RDNA2 signed-zero selection 2026-10-19 02:34:25 +02:00
nmzik 09c993dfe0 shader: query dimensions through shared indirect image selection 2026-10-19 02:34:25 +02:00
nmzik ac3711ce7c shader: select the primary mip for linear explicit-LOD gathers 2026-10-19 02:34:24 +02:00
nmzik 8639e0de81 shader: share indirect image accesses by type and guard emitted size 2026-10-18 20:16:49 +02:00
nmzik 22ef16a044 shader: implement PS5 vector data cache invalidation 2026-10-18 15:57:14 +02:00
nmzik 9f88043ebe shader: use compact integer RTZ half conversion 2026-10-17 12:23:12 +02:00
nmzik d1fe1324c8 shader: keep coherent 64bit atomic 2026-10-17 07:52:20 +02:00
Nawid3333 e93b4b0378 shader: support returning 32-bit LDS compare-exchange (DS_CMPST_RTN_B32) (#1578) 
* shader: support DS_CMPST_RTN_B32

Assassin's Creed Valhalla (PPSA01490, #281) stops on DS opcode 0x30 in a
compute shader. DS compares DATA and stores DATA2, the opposite of
BUFFER_ATOMIC_CMPSWAP, so the 32-bit atomic path swaps the two for this
opcode, as the 64-bit form does.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* shader: reject unsupported GDS compare-store variant

---------

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-17 04:37:16 +02:00
Çağatay Güçlü 02ead0e2e1 shader: 64-bit buffer atomic add (BUFFER_ATOMIC_ADD_X2) 2026-10-17 04:09:54 +02:00
NeySlim 4f1f3b1bb3 shader: make the f32 clamp modifier turn NaN into 0 2026-10-17 04:09:53 +02:00
nmzik d01633e18e Revert "Fix scalar buffer reads across sparse guest mappings" 
This reverts commit d7974dc763.
 2026-10-16 19:13:36 +02:00
nmzik d7974dc763 Fix scalar buffer reads across sparse guest mappings 2026-10-16 18:20:31 +02:00
shadowbeat070 57b161019d shader: honor front-face input format 2026-10-16 12:57:27 +02:00
AN0DIN 83db2efec3 shader: pack v_cvt_pkrtz_f16_f32 with the native half conversion (GTA V) (#1520) 
* shader: pack v_cvt_pkrtz_f16_f32 with the native half conversion

The round-toward-zero pack was emulated with integer operations: about 20 to 30 operations
per half. GTA V uses it in 613 of its 656 pixel shaders, about 16 times in each G-buffer
pixel shader.

The pair is now packed with PackHalf2x16, unpacked again, and each half whose magnitude
exceeds its input's takes one unit off. Half signs and magnitudes are separate, so that is
the next value toward zero, whatever rounding the native conversion uses as long as it
returns one of the two neighbours. Same bits as before for every finite input and infinity;
a NaN stays a NaN. Checked against the old code on 2 million values on the CPU, and on an
Apple M5 GPU through Metal (400 000 values, subnormals included, safe and fast math).

GTA V on an Apple M5 (MoltenVK), 1080p, fixed script camera, three places, A B B A between
launches: -1.7 to -2.8 ms per frame (+4 to +6 %).

Scope: generic
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* shader: remove half-pack commentary and unused shift helper

---------

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-16 02:56:35 +02:00
nmzik f7226ca7dc graphics: emit PS5 register object and primitive IDs to RT7 2026-10-15 22:28:01 +02:00
nmzik b4406b0467 graphics: render packed 11-11-10 UNorm targets with exact rounding 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-15 22:28:01 +02:00
nmzik fb213e8ae5 shader: share packed color component encoding 2026-10-15 22:28:01 +02:00
nmzik 1d3fd07fe6 shader: share indirect buffer format geometry lookup 2026-10-15 22:28:01 +02:00
nmzik bb2d6dbeb3 shader: share scalar condition results with direct subgroup votes 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-15 22:28:01 +02:00
nmzik 50844badbf shader: map debug SPIR-V blocks to native RDNA2 PCs 2026-10-15 22:28:01 +02:00
nmzik c1f6838e40 shader: share repeated raw indirect buffer load bodies 2026-10-15 22:28:01 +02:00
nmzik 8b81f665a2 shader: separate indirect buffer candidates from tracked root limits 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 21:19:38 +02:00
nmzik 1039c54f5d shader: share indirect buffer array access after an empty root 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 21:17:44 +02:00
nmzik b24ce3440d shader: track buffer liveness and offsets by resource count 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 21:11:14 +02:00
nmzik 4843d8d942 shader: support packed D16 XYZW formatted buffer stores 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 19:35:08 +02:00
nmzik 7468e4f60a shader: share descriptor dispatch for scalar and wide buffer stores 2026-10-14 19:01:14 +02:00
nmzik b6da068313 shader: preserve typed candidates for unfiltered indirect image access 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 18:57:26 +02:00
nmzik 127cf8d46f shader: route image stores through shared indirect descriptor access 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 18:39:40 +02:00
nmzik 302240da70 shader: lower complete wave minima for sparse fragment subgroups 2026-10-14 18:03:48 +02:00
nmzik 6d6da57a95 shader: share formatted stores for GPU-selected signed byte records 2026-10-14 17:10:02 +02:00
nmzik 487bbf95fd shader: share nested pointer-table image and sampler selection 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 16:40:15 +02:00
nmzik c88f05f7b5 graphics: share signed storage conversion and support R16 image writes 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 15:36:29 +02:00
nmzik 150bcb06a9 shader: share runtime buffer format conversion across loads 2026-10-14 14:29:40 +02:00
nmzik 26d326d1b0 shader: share bounded record descriptors for packed loads and byte stores 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 05:07:24 +02:00
nmzik 4cf5a96b79 shader: reuse prepared binding offsets and shared resource switch 2026-10-14 04:46:46 +02:00
nmzik 7bba785963 shader: load bytes and halfwords from GPU-selected buffers 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 04:35:21 +02:00
nmzik 6abfe3bbe4 shader: share formatted loads and support packed D16 XYZW buffers 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 04:09:57 +02:00
nmzik 1905b28b3c shader: decode packed UNorm image loads through shared conversion 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 03:53:32 +02:00
nmzik 9e41d8320a shader: support returning 64-bit LDS max and compare-exchange 2026-10-13 21:33:50 +00:00
nmzik 735a229236 shader: preserve native types in indirect image tables 2026-10-13 21:33:50 +00:00
nmzik 2f88a0a3b2 shader: elide bitcasts between identical physical types 2026-10-13 21:27:07 +00:00
nmzik 56738aa4e1 shader: sample packed normalized images with one bilinear gather 2026-10-13 21:27:07 +00:00
nmzik c11254a996 shader: share format conversion for packed normalized image stores 2026-10-13 21:27:07 +00:00
nmzik 9a7c54da58 shader: share formatted buffer payload reads across format conversions 2026-10-13 21:27:07 +00:00
nmzik e2c8b61de6 shader: remove unreachable mixed image specialization paths 2026-10-13 21:27:07 +00:00
nmzik f01a3750d4 shader: validate indirect image operands at each typed access 2026-10-13 21:27:07 +00:00