nmzik 0cdc5c1224 shader: build the V_MBCNT lanes-below mask with the shared right-mask helper

2026-10-21 23:11:26 +02:00

..

backend/spirv

shader: pack 16-bit lane pairs with one bit-field insert

2026-10-21 22:46:04 +02:00

frontend

shader: build the V_MBCNT lanes-below mask with the shared right-mask helper

2026-10-21 23:11:26 +02:00

ir

shader: share one find-first-bit lowering for S_FF0/FF1/FLBIT_I32_B64 and remove FindUMsb64

2026-10-21 22:39:34 +02:00

BufferFormat.h

shader: decode buffer formats once

2026-09-08 21:26:59 +04:00

ShaderRecompiler.cpp

shader: emit float min/max as host instructions on AMD GPUs (#1761)

2026-10-21 21:36:08 +02:00

ShaderRecompiler.h

shader: emit float min/max as host instructions on AMD GPUs (#1761)

2026-10-21 21:36:08 +02:00

Tessellation.cpp

shader: drop the unread F32Class bits and the per-pass HS reflection counter reset

2026-10-20 23:54:32 +02:00

Tessellation.h

gpu: isolate tessellation analysis and SPIR-V emission

2026-09-14 06:58:32 +04:00