46997dfc7a
shader: retain resource type IDs in SPIR-V emission state
2026-10-09 01:55:50 +02:00
e1ac893a0c
shader: collect usage once and emit descriptor slots directly
2026-10-09 02:17:38 +04:00
b35cdc39b7
shader: append deferred Phi operands directly to SPIR-V storage
2026-10-09 01:40:52 +04:00
52dbc724f8
shader: store SPIR-V definitions directly in IR nodes
2026-10-09 01:40:41 +04:00
b38b7454a6
Preserve vertex export locations for mixed pixel interpolation
2026-10-08 22:05:53 +04:00
a8beac190f
shader: evaluate scalar branch decisions across the complete guest wave
2026-10-07 21:17:35 +04:00
b96871e2bf
shader: unpack compressed SNORM16 color exports as normalized signed values
2026-10-07 21:17:35 +04:00
3ba6ebae81
shader: initialize perspective sample barycentrics at SampleId
2026-10-07 20:44:46 +04:00
26cce9909a
shader: add BUFFER_LOAD_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
5af370c257
shader: add BUFFER_STORE_FORMAT_D16_X opcode
2026-10-07 16:22:30 +04:00
ae1e92621d
shader: sample mixed bindless images through contiguous native arrays
2026-10-06 14:53:17 +04:00
cd06601022
shader: replace CPU selector chains with direct image-table lookup
2026-10-06 14:53:17 +04:00
9caec9f2c8
shader: preserve RDNA2 DLC coherence for flat address loads
2026-10-06 14:53:17 +04:00
5b826c6e4a
shader: emit native 64-bit operations where compatible
2026-10-05 20:41:03 +04:00
77d7722173
shader: disable explicit MAD denormal checks for performance testing
...
Comment out the five explicit flush checks and record the substantial 3DMiniGolf menu FPS drop on NVIDIA RTX 5080 Laptop GPU. Preserve separate multiply/add rounding and both NoContraction decorations.
The matched runs used silent logging, no debugger, no Vulkan validation, and the cd9fc6ff
2026-10-05 18:39:31 +04:00
7a0e1dafd7
shader: classify native half values with shared operand decoding
2026-10-05 18:39:31 +04:00
af3011cd69
shader: add missing 64-bit integer image atomics
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:12:06 +04:00
de9c15fa79
shader: encode SNORM and scaled formatted buffer stores
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
e85279ea7b
shader: correct DS float min/max operands and special values
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
d8be245c22
shader: separate legacy FP32 MAD rounding from fused FMA
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
94e7d239dd
gpu: fix zero-source alpha blending on swizzled targets
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
8274e517b2
shader: add FP64 min, max and rounding
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
b0bbaef1eb
gpu: store large compute shared memory in device buffers
2026-10-05 02:24:51 +04:00
0bef3fc0d3
gpu: fix separate alpha blending on swizzled render targets
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
07c84876a1
shader: fix constant types in converted image gathers
2026-10-05 02:24:51 +04:00
96c067d0fb
shader: fix filtering for scaled 8-bit textures
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
39248a1f87
shader: emit per-vertex mesh clip and cull distances
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Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
98557a83b6
shader: implement RDNA2 DS masked OR through shared atomic updates
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
c3f4962715
shader: use native narrow storage for byte-aligned PS5 buffers
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Co-authored-by: MehmetCambaz <mcambaz18@gmail.com >
2026-10-04 18:39:34 +04:00
dbf66b7f4f
shader: support RDNA2 BVH64 ray intersections with shared traversal
2026-10-04 18:39:34 +04:00
3ba0e971e9
shader: materialize exact buffer capacity through shared clean reads
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
8b05b6730e
shader: bind dispatch spans while keeping GPU record counts native
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
c17fa5b936
shader: implement RDNA2 DS forward lane permute
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
5f01308b20
shader: reuse aligned indirect buffer loads for scalar DWORD reads
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
Co-authored-by: tototomate123 <rushwars201966@gmail.com >
2026-10-04 18:39:34 +04:00
843b577880
shader: resolve bounded GPU material keys through sampled image arrays
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
a55a28380d
shader: decode GPU-selected formatted buffer loads with native bounds
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
7992aecb7c
shader: keep native rounding consistent in mixed-precision programs
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
b4d32394b6
shader: keep GPU-derived scalar resource reads on the GPU
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
284d58d1d5
shader: implement RDNA2 double-precision fractional part
2026-10-04 18:39:34 +04:00
e4aca7a60b
shader: initialize EXEC from requested dispatch thread extents
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
2026-10-04 18:39:34 +04:00
f58014ff0e
shader: preserve wave-wide vector-store completion before publication
2026-10-04 18:39:34 +04:00
429d0af62b
shader: bind bounded GPU-selected buffer store destinations
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-04 18:39:34 +04:00
f53e5d2283
fix windows ci ( #998 )
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* fix windows ci
* Fix Windows SPIR-V gather opcode narrowing conversion
2026-10-03 15:05:20 +04:00
bd611bfe15
Honor explicit gather LOD with shared image mip selection
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Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com >
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-03 14:19:33 +04:00
ef4c5baf3a
Implement RDNA2 64-bit image atomic maximum
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-03 14:19:32 +04:00
b3e419ff11
shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP ( #952 )
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* shader: implement 32-bit RDNA2 image atomic compare-and-swap
* shader: share atomic emission and correct image barriers
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-02 01:15:53 +04:00
7101741637
Cache SPIR-V arithmetic types lazily in existing emitters
2026-10-02 00:53:51 +04:00
f29bd0fe35
Reuse whole-wave ballot and first-lane SPIR-V results
2026-10-02 00:51:15 +04:00
0d0b215fab
shader: port 64-bit ALU and atomic opcodes
2026-10-02 00:51:15 +04:00
337f432016
shader: execute PS5 BVH intersections and local FLAT stacks
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Jean-Philippe <github@meunier.jp >
2026-10-02 00:51:15 +04:00
nmzik