4ebae87a1b
shader: apply the LOD clamp of image_sample _cl variants
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Co-authored-by: Senaxx <michelbeld@gmail.com >
2026-10-26 05:32:02 +01:00
27dc7c281f
graphics: keep bounded image heaps resident in a bindless descriptor set
2026-10-23 07:17:57 +02:00
79837b423d
graphics: support compute stores to 2D MSAA images
2026-10-22 22:11:06 +02:00
aafe014d0c
shader: read raw D16 depth bits through kDepth k16UInt image loads
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Co-authored-by: Artyom Zabroda <artyomzabroda@proton.me >
2026-10-22 22:11:06 +02:00
286481889f
shader: emit float min/max as host instructions on AMD GPUs ( #1761 )
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* shader: emit float min/max as host instructions on AMD GPUs
V_MIN_F32, V_MAX_F32, V_MIN3_F32 and V_MAX3_F32 were emulated with a
classify-and-select sequence of about a dozen instructions each, to give
the guest's NaN and signed-zero results on any host. AMD GPUs execute
GLSL.std.450 NMin/NMax with those same rules, so emit them directly when
the device is AMD and supports VK_KHR_shader_float_controls2. Each
instruction is decorated FPFastMathMode None, since
SignedZeroInfNanPreserve does not cover extended instructions. MED3 keeps
its exact emulation. KYTY_EMULATED_FLOAT_MIN_MAX=1 keeps the emulation.
In SAROS the two heaviest compute shaders get 37% and 59% faster on an
RX 9070 XT (RADV), about 4 ms of GPU time per frame.
Adds VectorMinMaxF32RuntimeEdges (runtime operands, so nothing is folded)
and a --float-min-max-only mode that runs it and
VectorMinMaxF32NanAndSignedZeroEdges with the emulation and, where
supported, with host instructions.
Developed with AI assistance (Claude Code).
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
* shader: gate host float min/max on RADV and check the emitted instructions
* shader: drop float controls 2 from host float min/max
* shader: drop the float min/max env override and atomic flag
* shader: pass host capabilities to the SPIR-V emitter as a profile built once per device
* shader: enable host float min/max on AMD GPUs
---------
Co-authored-by: arda <ardaeska@gmail.com >
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-21 21:36:08 +02:00
09c993dfe0
shader: query dimensions through shared indirect image selection
2026-10-19 02:34:25 +02:00
ac3711ce7c
shader: select the primary mip for linear explicit-LOD gathers
2026-10-19 02:34:24 +02:00
8639e0de81
shader: share indirect image accesses by type and guard emitted size
2026-10-18 20:16:49 +02:00
fb213e8ae5
shader: share packed color component encoding
2026-10-15 22:28:01 +02:00
b6da068313
shader: preserve typed candidates for unfiltered indirect image access
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 18:57:26 +02:00
127cf8d46f
shader: route image stores through shared indirect descriptor access
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 18:39:40 +02:00
487bbf95fd
shader: share nested pointer-table image and sampler selection
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 16:40:15 +02:00
c88f05f7b5
graphics: share signed storage conversion and support R16 image writes
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 15:36:29 +02:00
1905b28b3c
shader: decode packed UNorm image loads through shared conversion
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 03:53:32 +02:00
735a229236
shader: preserve native types in indirect image tables
2026-10-13 21:33:50 +00:00
56738aa4e1
shader: sample packed normalized images with one bilinear gather
2026-10-13 21:27:07 +00:00
c11254a996
shader: share format conversion for packed normalized image stores
2026-10-13 21:27:07 +00:00
e2c8b61de6
shader: remove unreachable mixed image specialization paths
2026-10-13 21:27:07 +00:00
f01a3750d4
shader: validate indirect image operands at each typed access
2026-10-13 21:27:07 +00:00
460a196fca
shader: emit dynamic sample offsets with the enabled maintenance8 feature
2026-10-13 21:27:07 +00:00
652154aead
shader: merge typed image candidates as raw vectors with shared sampler variants
2026-10-13 21:27:07 +00:00
984cfcebd1
shader: emit native texel offsets using sample execution context
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Co-authored-by: netwarex <mail@pety.me >
2026-10-11 18:53:01 +02:00
4c87dbebb2
shader: select indirect texture descriptors for image gathers
2026-10-11 18:53:01 +02:00
8c81386568
shader: share finite descriptor planning with GPU-selected inline samplers
2026-10-09 15:06:39 +00:00
71c7261740
shader: share indirect texture dispatch with image loads
2026-10-09 15:06:39 +00:00
8abf99c56e
shader: emit bounded SPIR-V operands without temporary vectors
2026-10-09 01:58:39 +02:00
e1ac893a0c
shader: collect usage once and emit descriptor slots directly
2026-10-09 02:17:38 +04:00
ae1e92621d
shader: sample mixed bindless images through contiguous native arrays
2026-10-06 14:53:17 +04:00
cd06601022
shader: replace CPU selector chains with direct image-table lookup
2026-10-06 14:53:17 +04:00
5b826c6e4a
shader: emit native 64-bit operations where compatible
2026-10-05 20:41:03 +04:00
07c84876a1
shader: fix constant types in converted image gathers
2026-10-05 02:24:51 +04:00
96c067d0fb
shader: fix filtering for scaled 8-bit textures
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
843b577880
shader: resolve bounded GPU material keys through sampled image arrays
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
a55a28380d
shader: decode GPU-selected formatted buffer loads with native bounds
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
2026-10-04 18:39:34 +04:00
429d0af62b
shader: bind bounded GPU-selected buffer store destinations
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-04 18:39:34 +04:00
f53e5d2283
fix windows ci ( #998 )
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* fix windows ci
* Fix Windows SPIR-V gather opcode narrowing conversion
2026-10-03 15:05:20 +04:00
bd611bfe15
Honor explicit gather LOD with shared image mip selection
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Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com >
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-03 14:19:33 +04:00
ef4c5baf3a
Implement RDNA2 64-bit image atomic maximum
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-03 14:19:32 +04:00
b3e419ff11
shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP ( #952 )
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* shader: implement 32-bit RDNA2 image atomic compare-and-swap
* shader: share atomic emission and correct image barriers
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-02 01:15:53 +04:00
0d0b215fab
shader: port 64-bit ALU and atomic opcodes
2026-10-02 00:51:15 +04:00
cf268af839
Shader: implement RDNA2 image atomic float maximum
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Shader: implement RDNA2 image atomic float minimum
Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: frans <francois.att@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
Co-authored-by: Matthew Hurley <171001439+theantipopau@users.noreply.github.com >
2026-09-26 15:15:35 +04:00
3b89e36d1e
Track bounded indirect image tables from signed shader loops
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Co-authored-by: TarkusR <90155059+TarkusR@users.noreply.github.com >
2026-09-24 11:13:33 +04:00
eb8a5504a3
Emit coordinates for each indirect image candidate
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
2026-09-23 15:41:02 +04:00
e0ecffed70
Approximate explicit-LOD texture gathers at mip zero
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Credits:
YuhiAida (@YuhiAida):
https://github.com/KytyPS5/KytyPS5/pull/588
https://github.com/KytyPS5/KytyPS5/pull/589
https://github.com/KytyPS5/KytyPS5/pull/655
frans (@francoisatt):
https://github.com/KytyPS5/KytyPS5/pull/590
BlackCAT (@psnwd):
https://github.com/KytyPS5/KytyPS5/pull/613
shadowbeat070 (@shadowbeat070):
https://github.com/KytyPS5/KytyPS5/pull/654
Pouare514 (@Pouare514):
https://github.com/KytyPS5/KytyPS5/pull/29
https://github.com/KytyPS5/KytyPS5/pull/32
2026-09-17 08:39:57 +04:00
1208d22547
Fix Windows Clang SPIR-V serialization with typed operands
2026-09-12 13:08:23 +02:00
59ef88c959
shader: generate SPIR-V dispatch and marshal handler arguments
2026-09-12 13:42:15 +04:00
1d1f00bdef
shader: use Khronos definitions and simplify compiler ownership
2026-09-12 13:42:15 +04:00
9f49ac8249
shader: reuse SPIR-V helpers and memory resources
2026-09-08 21:26:59 +04:00
2b3993a595
shader: share emitter helpers
2026-09-08 21:26:59 +04:00
2ec0e9e8f3
shader: fix packed image address reads
2026-09-05 11:32:32 +04:00
nmzik