4ebae87a1b
shader: apply the LOD clamp of image_sample _cl variants
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Co-authored-by: Senaxx <michelbeld@gmail.com >
2026-10-26 05:32:02 +01:00
b4209dde1b
graphics: write the subdraw index of multi-draw indirect packets
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-26 05:32:02 +01:00
72d7da7266
texture_cache: view BC images for raw reads of their layers instead of evicting them
2026-10-26 05:32:02 +01:00
95bbc9c65d
graphics: hold image heap descriptors whose address another extent pins
2026-10-26 05:32:02 +01:00
4db225008b
graphics: resize image heap tables in place when their descriptor size changes
2026-10-26 05:32:02 +01:00
dc3bd68dee
gpu: bound null storage bindings to zero bytes
2026-10-26 05:32:02 +01:00
c1dfb309a1
graphics: drop image heap table snapshots superseded at the same base
2026-10-26 05:32:02 +01:00
ba7f9969ef
shader: bound storage buffers by pushed binding sizes instead of OpArrayLength
2026-10-26 05:32:02 +01:00
463a096249
graphics: unwatch image heap pages on writes next to a table
2026-10-26 05:32:02 +01:00
b2c9ec7609
renderer: decode R8, R8G8 and R16_UINT color register clears ( #1893 )
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DecodePackedColorClear had no case for R8_UNORM/UINT, R8G8_UNORM/UINT and
R16_UINT, so a CMASK fast clear of such a render target was dropped and the
target kept its old contents. UFC 6 (PPSA23566) fast-clears an R8_UINT
region map this way every frame and then writes only part of it; a capture
showed the map never cleared. DWORD fills of these formats are decoded only
when every pixel in the word holds the same value.
Co-authored-by: 4wgycvn84p-afk <346802885+4wgycvn84p-afk@users.noreply.github.com >
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-25 18:47:45 +01:00
dd5bc26c64
pipeline: write the shader store on a background thread
2026-10-25 02:20:44 +02:00
72903bfce6
shader: use the V_PERMLANE16 row directly instead of copying it
2026-10-25 02:20:44 +02:00
59d8256b36
shader: encode 11/10-bit float formatted buffer stores as truncated unsigned floats
2026-10-25 02:20:44 +02:00
9a20c6f738
shader: disable DPP16 writes from EXEC-disabled sources without BOUND_CTRL
2026-10-25 02:20:44 +02:00
67c89e0915
shader: keep the old V_PERMLANE16 destination for inactive sources without BOUND_CTRL
2026-10-25 02:20:44 +02:00
e864cb20bd
shader: clamp V_FRACT_F16/F32/F64 results below one
2026-10-25 02:20:44 +02:00
ec8b75b244
pipeline: persist shaders and pipelines per game and prewarm them at boot
2026-10-25 02:20:44 +02:00
9210264d47
shader: saturate V_CVT_PK_U16_U32 and V_CVT_PK_I16_I32
2026-10-25 02:20:44 +02:00
87e49282b8
pipeline: log real shader compiles to the console
2026-10-25 02:20:44 +02:00
1816004357
shader: serialize resource plans for the shader cache
2026-10-25 02:20:44 +02:00
bfc377627a
pipeline: create pipelines from GraphicsPipelineKey and shader modules
2026-10-25 02:20:44 +02:00
4b651f2ba7
pipeline: fold the program cache into PipelineCache with stable module ids
2026-10-25 02:20:44 +02:00
dbc7b8b2ff
pipeline: look up draw programs and pipelines from the command buffer
2026-10-24 05:18:46 +02:00
269e411ef2
graphics: index live cache slots directly
2026-10-24 04:26:16 +02:00
170c107779
texture_cache: dedupe region queries with a picked flag
2026-10-24 04:03:01 +02:00
8dc0d56b7e
common: SlotVector without generations
2026-10-24 03:48:46 +02:00
d7856753e0
shader: walk every resource plan with the x86 SRT walker
2026-10-24 02:57:24 +02:00
f356fa3730
gpu: move the BDA sync queue from MemoryTracker into BufferCache
2026-10-24 01:05:19 +02:00
6aaa533296
gpu: queue GDS release interrupts behind earlier interrupts
2026-10-23 22:22:39 +02:00
dc40478e7b
gpu: deliver RELEASE_MEM interrupts with the slice flush instead of their own
2026-10-23 22:14:55 +02:00
bf5dd62eea
gpu: decode RELEASE_MEM directly from the driver's native packet
2026-10-23 21:11:07 +02:00
227f12ee4b
gpu: remove the PS4-era constant engine, marker NOPs and EVENT_WRITE_EOP/EOS packets
2026-10-23 20:42:41 +02:00
77a8f30758
shader: read S_MEMREALTIME from the host device clock shifted to about 100 MHz
2026-10-23 19:48:53 +02:00
ecc30a1f2d
shader: decode S_FLBIT_I32 and S_FLBIT_I32_I64 with a 4-op signed leading-bit search
2026-10-23 19:48:53 +02:00
38c884e8c1
graphics: keep image heap descriptors of unmapped textures null
2026-10-23 07:17:57 +02:00
27dc7c281f
graphics: keep bounded image heaps resident in a bindless descriptor set
2026-10-23 07:17:57 +02:00
79837b423d
graphics: support compute stores to 2D MSAA images
2026-10-22 22:11:06 +02:00
aafe014d0c
shader: read raw D16 depth bits through kDepth k16UInt image loads
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Co-authored-by: Artyom Zabroda <artyomzabroda@proton.me >
2026-10-22 22:11:06 +02:00
a358b847c1
graphics: stall waitUntilSafeForRendering in its command processor instead of the GPU thread
2026-10-22 22:11:06 +02:00
a951a91703
spirv: emit OpName only with debug info
2026-10-22 22:11:06 +02:00
86fed10b81
graphics: draw non-indexed and native-fetch indirect draws from GPU-read records
2026-10-22 16:12:20 +02:00
949de19bb0
graphics: draw indexed indirect multi-draws from GPU-read arguments
2026-10-22 16:12:20 +02:00
c513a4a13a
graphics: draw single indexed indirect draws from GPU-read arguments
2026-10-22 16:12:20 +02:00
b54057942d
texture cache: select color-metadata clears on the GPU with conditional rendering
2026-10-22 16:12:20 +02:00
5f5d6effa4
graphics: count DCC/CMASK metadata readbacks in the performance overlay
2026-10-22 16:12:20 +02:00
c5016d9455
shader: support D16 XY and XYZ formatted buffer loads and stores
2026-10-22 05:26:54 +02:00
8502d8a77d
image: drop optional create flags the driver rejects instead of aborting ( #1760 )
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* image: request extended usage only for storage images
* tests: restore block-texel-view support through the flag check loop order
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-22 03:56:13 +02:00
919fac13d0
shader: read lane 0 in V_READFIRSTLANE when EXEC is zero instead of an undefined lane
2026-10-22 01:20:54 +02:00
11465a5e3c
shader: drop the large-input select before sin and cos since fract already returns zero
2026-10-22 00:44:43 +02:00
09a9654458
shader: compute DPP permute, rotate, mirror and share lanes with bit-field and XOR ops
2026-10-22 00:40:07 +02:00
nmzik