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1,222 Commits 1 Branch 479 Tags
b96871e2bff67570094b67012ddb62ba3601974c
Commit Graph

148 Commits

Author SHA1 Message Date
Claxten b96871e2bf shader: unpack compressed SNORM16 color exports as normalized signed values 2026-10-07 21:17:35 +04:00
Claxten 3ba6ebae81 shader: initialize perspective sample barycentrics at SampleId 2026-10-07 20:44:46 +04:00
nmzik 26cce9909a shader: add BUFFER_LOAD_FORMAT_D16_X opcode 2026-10-07 16:22:30 +04:00
nmzik 5af370c257 shader: add BUFFER_STORE_FORMAT_D16_X opcode 2026-10-07 16:22:30 +04:00
nmzik ae1e92621d shader: sample mixed bindless images through contiguous native arrays 2026-10-06 14:53:17 +04:00
Claxten cd06601022 shader: replace CPU selector chains with direct image-table lookup 2026-10-06 14:53:17 +04:00
Claxten 9caec9f2c8 shader: preserve RDNA2 DLC coherence for flat address loads 2026-10-06 14:53:17 +04:00
nmzik 5b826c6e4a shader: emit native 64-bit operations where compatible 2026-10-05 20:41:03 +04:00
nmzik 77d7722173 shader: disable explicit MAD denormal checks for performance testing 
Comment out the five explicit flush checks and record the substantial 3DMiniGolf menu FPS drop on NVIDIA RTX 5080 Laptop GPU. Preserve separate multiply/add rounding and both NoContraction decorations.

The matched runs used silent logging, no debugger, no Vulkan validation, and the cd9fc6ff revert on both revisions. Native denormal behavior remains GPU-dependent.
 2026-10-05 18:39:31 +04:00
nmzik 7a0e1dafd7 shader: classify native half values with shared operand decoding 2026-10-05 18:39:31 +04:00
nmzik af3011cd69 shader: add missing 64-bit integer image atomics 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:12:06 +04:00
nmzik de9c15fa79 shader: encode SNORM and scaled formatted buffer stores 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:11:48 +04:00
nmzik e85279ea7b shader: correct DS float min/max operands and special values 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:11:48 +04:00
nmzik d8be245c22 shader: separate legacy FP32 MAD rounding from fused FMA 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-05 04:11:48 +04:00
nmzik 94e7d239dd gpu: fix zero-source alpha blending on swizzled targets 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 8274e517b2 shader: add FP64 min, max and rounding 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik b0bbaef1eb gpu: store large compute shared memory in device buffers 2026-10-05 02:24:51 +04:00
nmzik 0bef3fc0d3 gpu: fix separate alpha blending on swizzled render targets 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 07c84876a1 shader: fix constant types in converted image gathers 2026-10-05 02:24:51 +04:00
nmzik 96c067d0fb shader: fix filtering for scaled 8-bit textures 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 39248a1f87 shader: emit per-vertex mesh clip and cull distances 
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik 98557a83b6 shader: implement RDNA2 DS masked OR through shared atomic updates 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik c3f4962715 shader: use native narrow storage for byte-aligned PS5 buffers 
Co-authored-by: MehmetCambaz <mcambaz18@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik dbf66b7f4f shader: support RDNA2 BVH64 ray intersections with shared traversal 2026-10-04 18:39:34 +04:00
nmzik 3ba0e971e9 shader: materialize exact buffer capacity through shared clean reads 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik 8b05b6730e shader: bind dispatch spans while keeping GPU record counts native 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik c17fa5b936 shader: implement RDNA2 DS forward lane permute 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik 5f01308b20 shader: reuse aligned indirect buffer loads for scalar DWORD reads 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
Co-authored-by: tototomate123 <rushwars201966@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik 843b577880 shader: resolve bounded GPU material keys through sampled image arrays 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik a55a28380d shader: decode GPU-selected formatted buffer loads with native bounds 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik 7992aecb7c shader: keep native rounding consistent in mixed-precision programs 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-04 18:39:34 +04:00
nmzik b4d32394b6 shader: keep GPU-derived scalar resource reads on the GPU 
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik 284d58d1d5 shader: implement RDNA2 double-precision fractional part 2026-10-04 18:39:34 +04:00
nmzik e4aca7a60b shader: initialize EXEC from requested dispatch thread extents 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
 2026-10-04 18:39:34 +04:00
nmzik f58014ff0e shader: preserve wave-wide vector-store completion before publication 2026-10-04 18:39:34 +04:00
nmzik 429d0af62b shader: bind bounded GPU-selected buffer store destinations 
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
 2026-10-04 18:39:34 +04:00
nmzik f53e5d2283 fix windows ci (#998) 
* fix windows ci

* Fix Windows SPIR-V gather opcode narrowing conversion
 2026-10-03 15:05:20 +04:00
frans bd611bfe15 Honor explicit gather LOD with shared image mip selection 
Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com>
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
 2026-10-03 14:19:33 +04:00
BlackCAT ef4c5baf3a Implement RDNA2 64-bit image atomic maximum 
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
 2026-10-03 14:19:32 +04:00
Louis b3e419ff11 shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP (#952) 
* shader: implement 32-bit RDNA2 image atomic compare-and-swap

* shader: share atomic emission and correct image barriers

---------

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-02 01:15:53 +04:00
nmzik 7101741637 Cache SPIR-V arithmetic types lazily in existing emitters 2026-10-02 00:53:51 +04:00
nmzik f29bd0fe35 Reuse whole-wave ballot and first-lane SPIR-V results 2026-10-02 00:51:15 +04:00
Senaxx 0d0b215fab shader: port 64-bit ALU and atomic opcodes 2026-10-02 00:51:15 +04:00
nmzik 337f432016 shader: execute PS5 BVH intersections and local FLAT stacks 
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Jean-Philippe <github@meunier.jp>
 2026-10-02 00:51:15 +04:00
nmzik 581dad7dd3 shader: implement RDNA2 FP64 equality comparisons 
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
 2026-10-02 00:51:15 +04:00
nmzik 73615c31ff graphics: preserve logical alpha when blending reordered targets (PPSA02721) 
Co-authored-by: EmK530 <admin@emk530.net>
 2026-09-29 19:52:40 +04:00
nmzik 6799ecbc5b shader: add native 64-bit LDS OR with shared typed storage views 2026-09-29 19:13:33 +04:00
nmzik 2016f8e2fe gpu: address extended guest memory without widening dense cache tables 2026-09-28 18:01:49 +04:00
gohansharma79-svg 0a5774be7b shader: support FP64 conversions used by FighterZ (#884) 
shader: support float and unsigned widening to FP64

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-09-28 17:39:31 +04:00
nmzik 0791f921f6 UFC 5 in-game (#883) 
* shader: release descriptor dependencies

* shader: simplify shared-exit control flow

* shader: fix scalar memory loads

* shader: fix LDS counter bounds

* renderer: skip inactive pixel shaders

* shader: respect FP32 mode in comparisons

* renderer: fix sampler border colors

* shader: resolve descriptors from control flow

* shader: resolve descriptors before resource planning

* shader: handle scalar guards for image bounds

* shader: handle reduced guards for image loops

* shader: fix wave guards and material indices

* shader: preserve scalar buffer offset alignment and carry

* shader: prove masked loop bounds across iteration transitions

* shader: preserve source and IR before resource tracking failures

* shader: track material keys selected from active lanes

* shader: remove obsolete post-dominator analysis

* shader: follow bounds guards through control-flow joins
 2026-09-28 16:03:05 +04:00