cfb8f7b246
Decode unsigned byte sources for SDWA half-float conversion
2026-09-22 11:11:36 +04:00
549495575c
shader: add S_BITCMP0_B64 and S_BITCMP1_B64 ( #688 )
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* shader: add S_BITCMP0_B64 and S_BITCMP1_B64
* test: move S_BITCMP_B64 coverage to compute suite
* test: use the existing compute CTest entry for bit comparisons
* test: remove the dedicated S_BITCMP_B64 command-line selector
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-20 19:36:12 +04:00
cfb110e0aa
shader: allow partial SDWA destinations for V_NOT_B32 ( #684 )
2026-09-20 18:21:40 +04:00
ea6aae8577
shader: V_MAD_I16
2026-09-19 04:43:48 +04:00
5b7d3343cf
shader: V_CMP_NLT_F16
2026-09-18 12:25:13 +04:00
394e638905
shader: V_MUL_LO_U16
2026-09-18 11:21:57 +04:00
bfc8cd0e0b
shader: DPP8 moves
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Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
2026-09-18 09:11:55 +04:00
5dc644edb4
clean up graphics helpers
2026-09-17 20:35:36 +04:00
cc8e02380f
remove magic_enum wrappers
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Co-authored-by: Saadi <cosxmos@gmail.com >
2026-09-17 20:35:36 +04:00
4b77686566
shader: V_CMP_NGT_F16
2026-09-17 16:56:32 +04:00
f30afc184e
shader: support S_ASHR_I64 ( #658 )
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* shader: implement S_ASHR_I64 with compute coverage
* tests: use existing compute suite for S_ASHR_I64
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-17 10:48:05 +04:00
235e24d44f
Recognize null-destination SWAPPC shader handoffs
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Credits:
BlackCAT (@psnwd):
https://github.com/KytyPS5/KytyPS5/pull/613
YuhiAida (@YuhiAida):
https://github.com/KytyPS5/KytyPS5/pull/655
2026-09-17 08:45:21 +04:00
e0ecffed70
Approximate explicit-LOD texture gathers at mip zero
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Credits:
YuhiAida (@YuhiAida):
https://github.com/KytyPS5/KytyPS5/pull/588
https://github.com/KytyPS5/KytyPS5/pull/589
https://github.com/KytyPS5/KytyPS5/pull/655
frans (@francoisatt):
https://github.com/KytyPS5/KytyPS5/pull/590
BlackCAT (@psnwd):
https://github.com/KytyPS5/KytyPS5/pull/613
shadowbeat070 (@shadowbeat070):
https://github.com/KytyPS5/KytyPS5/pull/654
Pouare514 (@Pouare514):
https://github.com/KytyPS5/KytyPS5/pull/29
https://github.com/KytyPS5/KytyPS5/pull/32
2026-09-17 08:39:57 +04:00
5b541375a3
shader: implement S_CBRANCH_CDBGSYS opcode
2026-09-16 17:04:48 +04:00
acd7435d31
Support byte destinations in V_MOV_B32
2026-09-15 18:25:20 +04:00
87971a28f5
gpu: isolate tessellation analysis and SPIR-V emission
2026-09-14 06:58:32 +04:00
a21ffde34e
shader: decode and translate V_FRACT_F16 (VOP1 0x5f) and V_CMPX_LT_U16 (VOPC 0xb9) ( #582 )
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shader: support V_FRACT_F16 and V_CMPX_LT_U16
Decode compact, SDWA, and VOP3 forms using the existing arithmetic and comparison paths. Preserve EXEC masking and VCC for the integer compare, and reject unsupported DPP encoding.
Add captured-instruction, operand-selection, floating-point edge, and execution-mask regression coverage.
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-12 17:21:32 +04:00
7bcd43dbee
shader: support S_MUL_HI_I32 (SOP2 0x36) ( #576 )
2026-09-12 14:56:14 +04:00
c3546577b6
shader: implement S_WQM_B32
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Co-authored-by: Brandon Strong <brandostrong@gmail.com >
2026-09-10 14:11:46 +04:00
c913951f7b
shader: implement RDNA2 subvector loop mask and branch semantics
2026-09-10 14:11:46 +04:00
3902b42096
shader: share direct and conditional branch classification
2026-09-10 14:11:46 +04:00
32ea0869e5
shader: implement S_ORN2_SAVEEXEC_B32
2026-09-09 13:11:48 +04:00
e04007a7c6
shader: implement DS_INC_RTN_U32 and DS_DEC_RTN_U32
2026-09-09 12:56:20 +04:00
839c172612
shader: reuse operands and remove duplicate helpers
2026-09-08 21:26:59 +04:00
6f66f77b09
shader: drop unused decoder fields
2026-09-08 21:26:59 +04:00
72963b01e1
shader: remove redundant decoder and translator state
2026-09-08 21:26:59 +04:00
bf7ca29487
shader: decode VOP3 FMAC source modifiers
2026-09-07 05:25:26 +04:00
49ff962f69
shader: add conditional 64-bit scalar moves
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-09-05 15:38:51 +04:00
2ec0e9e8f3
shader: fix packed image address reads
2026-09-05 11:32:32 +04:00
51afce3a97
shader: zero-extend unsigned SOPK comparisons
2026-09-05 10:38:29 +04:00
2fe5c150bc
shader: implement BUFFER_ATOMIC_CMPSWAP ( #357 )
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shader: implement RDNA2 buffer atomic compare swap
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-03 23:34:34 +02:00
b3c8f91a84
graphics: implement RDNA2 buffer atomic swap x2
2026-09-03 10:17:04 +02:00
858c18468b
graphics: implement RDNA2 buffer atomic OR x2
2026-09-03 05:39:05 +02:00
2d5023fda2
shader: support IMAGE_ATOMIC_SWAP ( #456 )
2026-09-03 03:37:55 +02:00
e9425e101d
shader: add missing RDNA2 ALU opcodes
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Add missing scalar and vector opcodes with compute tests.
Original work by @Pouare514 in #176 .
Co-authored-by: Pouare514 <julienaulycee@gmail.com >
2026-09-02 01:56:55 +04:00
1342c6f1e1
shader: took fixes from PR 427
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- apply c8f34f9's ResourceTracking portability fix
- complete V_CMP_LT_U64 and S_FLBIT_I32_B32 support
- add the sceAmprCommandBufferWaitOnAddress NID from f625a47me@itsmemac.com >
2026-08-31 23:49:21 +04:00
1592cf2b1b
shader: accept SDWA byte source for reverse shift
2026-08-31 09:53:26 +04:00
af8aecfdde
shader: remove recompiler error-string propagation
2026-08-31 05:31:41 +04:00
9992ab18fc
shader: preserve untouched half in VOP1 B16 writes ( #370 )
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shader: preserve native 16-bit destinations
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 19:33:26 +04:00
18af08460f
shader: take the high half per lane in V_PK_FMAC_F16 ( #404 )
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 15:08:22 +04:00
39ee9972b8
shader: V_CMPX_CLASS_F32
2026-08-30 14:32:07 +04:00
ff61c1cecd
shader: implement V_SIN_F16 ( #399 )
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 01:32:49 +04:00
1a87cfedb5
shader: implement V_COS_F16
2026-08-29 19:23:19 +04:00
5bd447d2a2
shader: implement DS_BPERMUTE_B32
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
2026-08-29 19:23:19 +04:00
ef639610e7
shader: allow SDWA add-with-carry
2026-08-29 15:31:20 +04:00
fcc9dff5b9
shader: DS_WRITE_B16_D16_HI
2026-08-29 14:40:13 +04:00
d9ae3ed64c
shader: V_FFBH_I32
2026-08-29 14:03:57 +04:00
53a59434d8
shader: implement V_CMP_EQ_U64
2026-08-29 11:26:05 +04:00
18b6c9059b
shader: support DS_READ_U16_D16_HI ( #356 )
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Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com >
2026-08-29 10:39:45 +04:00
715539804b
shader: accept SDWA for VOP1 bit operations ( #360 )
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Allow byte, word, and full-dword SDWA source selection for V_NOT_B32 and V_FFBL_B32. Add captured instruction tests that verify decoding, IR extraction, SPIR-V generation, and runtime results.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com >
2026-08-29 10:28:28 +04:00
nmzik