d7c1896647
shader: interpolate f16 parameter halves (V_INTERP_P1LL_F16, V_INTERP_P2_F16) ( #1792 )
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shader: interpolate packed f16 attributes for v_interp_p1ll_f16 and v_interp_p2_f16
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-22 04:54:10 +02:00
4a1440197f
shader: share one find-first-bit lowering for S_FF0/FF1/FLBIT_I32_B64 and remove FindUMsb64
2026-10-21 22:39:34 +02:00
6e5167598e
shader: compute add-with-carry with compares and remove IAddCarry32
2026-10-21 22:28:11 +02:00
c571d8ed5a
shader: remove IR opcodes and IREmitter helpers that nothing produces
2026-10-21 22:19:26 +02:00
22ef16a044
shader: implement PS5 vector data cache invalidation
2026-10-18 15:57:14 +02:00
e93b4b0378
shader: support returning 32-bit LDS compare-exchange (DS_CMPST_RTN_B32) ( #1578 )
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* shader: support DS_CMPST_RTN_B32
Assassin's Creed Valhalla (PPSA01490, #281 ) stops on DS opcode 0x30 in a
compute shader. DS compares DATA and stores DATA2, the opposite of
BUFFER_ATOMIC_CMPSWAP, so the 32-bit atomic path swaps the two for this
opcode, as the 64-bit form does.
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com >
* shader: reject unsupported GDS compare-store variant
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Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-17 04:37:16 +02:00
02ead0e2e1
shader: 64-bit buffer atomic add (BUFFER_ATOMIC_ADD_X2)
2026-10-17 04:09:54 +02:00
302240da70
shader: lower complete wave minima for sparse fragment subgroups
2026-10-14 18:03:48 +02:00
26d326d1b0
shader: share bounded record descriptors for packed loads and byte stores
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Co-authored-by: fxpw <fxpw@outlook.com >
2026-10-14 05:07:24 +02:00
9e41d8320a
shader: support returning 64-bit LDS max and compare-exchange
2026-10-13 21:33:50 +00:00
984cfcebd1
shader: emit native texel offsets using sample execution context
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Co-authored-by: netwarex <mail@pety.me >
2026-10-11 18:53:01 +02:00
59183dbfa8
shader: add missing F64 VOPC compares
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Co-authored-by: Hector Mödinger S. <hectormodinger@gmail.com >
2026-10-09 21:01:51 +02:00
7a0e1dafd7
shader: classify native half values with shared operand decoding
2026-10-05 18:39:31 +04:00
af3011cd69
shader: add missing 64-bit integer image atomics
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:12:06 +04:00
e85279ea7b
shader: correct DS float min/max operands and special values
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
d8be245c22
shader: separate legacy FP32 MAD rounding from fused FMA
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-05 04:11:48 +04:00
8274e517b2
shader: add FP64 min, max and rounding
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Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-10-05 02:24:51 +04:00
98557a83b6
shader: implement RDNA2 DS masked OR through shared atomic updates
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
c17fa5b936
shader: implement RDNA2 DS forward lane permute
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-04 18:39:34 +04:00
284d58d1d5
shader: implement RDNA2 double-precision fractional part
2026-10-04 18:39:34 +04:00
e4aca7a60b
shader: initialize EXEC from requested dispatch thread extents
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Co-authored-by: TheCruZ <thecruzwtf@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
2026-10-04 18:39:34 +04:00
f58014ff0e
shader: preserve wave-wide vector-store completion before publication
2026-10-04 18:39:34 +04:00
bd611bfe15
Honor explicit gather LOD with shared image mip selection
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Co-authored-by: YuhiAida <21134775+YuhiAida@users.noreply.github.com >
Co-authored-by: BlackCAT <52720489+psnwd@users.noreply.github.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-03 14:19:33 +04:00
ef4c5baf3a
Implement RDNA2 64-bit image atomic maximum
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Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-10-03 14:19:32 +04:00
28f29b8e6f
Inline common IR operands and share storage with Phi pairs
2026-10-02 13:24:03 +04:00
b3e419ff11
shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP ( #952 )
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* shader: implement 32-bit RDNA2 image atomic compare-and-swap
* shader: share atomic emission and correct image barriers
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-02 01:15:53 +04:00
0d0b215fab
shader: port 64-bit ALU and atomic opcodes
2026-10-02 00:51:15 +04:00
337f432016
shader: execute PS5 BVH intersections and local FLAT stacks
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Jean-Philippe <github@meunier.jp >
2026-10-02 00:51:15 +04:00
581dad7dd3
shader: implement RDNA2 FP64 equality comparisons
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Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-02 00:51:15 +04:00
6799ecbc5b
shader: add native 64-bit LDS OR with shared typed storage views
2026-09-29 19:13:33 +04:00
0a5774be7b
shader: support FP64 conversions used by FighterZ ( #884 )
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shader: support float and unsigned widening to FP64
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-28 17:39:31 +04:00
0791f921f6
UFC 5 in-game ( #883 )
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* shader: release descriptor dependencies
* shader: simplify shared-exit control flow
* shader: fix scalar memory loads
* shader: fix LDS counter bounds
* renderer: skip inactive pixel shaders
* shader: respect FP32 mode in comparisons
* renderer: fix sampler border colors
* shader: resolve descriptors from control flow
* shader: resolve descriptors before resource planning
* shader: handle scalar guards for image bounds
* shader: handle reduced guards for image loops
* shader: fix wave guards and material indices
* shader: preserve scalar buffer offset alignment and carry
* shader: prove masked loop bounds across iteration transitions
* shader: preserve source and IR before resource tracking failures
* shader: track material keys selected from active lanes
* shader: remove obsolete post-dominator analysis
* shader: follow bounds guards through control-flow joins
2026-09-28 16:03:05 +04:00
16b83a034c
Shader: execute RDNA2 FP64 shadow arithmetic and log denorm limits
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Shader: disable FP64 denorm preservation controls for now
2026-09-26 15:15:35 +04:00
cf268af839
Shader: implement RDNA2 image atomic float maximum
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Shader: implement RDNA2 image atomic float minimum
Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: frans <francois.att@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
Co-authored-by: Matthew Hurley <171001439+theantipopau@users.noreply.github.com >
2026-09-26 15:15:35 +04:00
bfc8cd0e0b
shader: DPP8 moves
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Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
2026-09-18 09:11:55 +04:00
7516068662
gpu: compile RDNA2 tessellation through native LS HS and TES stages
2026-09-14 06:58:32 +04:00
e04007a7c6
shader: implement DS_INC_RTN_U32 and DS_DEC_RTN_U32
2026-09-09 12:56:20 +04:00
3213934d42
shader: run merged geometry stages as mesh shaders
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Co-authored-by: Brandon Strong <brandostrong@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com >
2026-09-05 08:32:23 +04:00
2fe5c150bc
shader: implement BUFFER_ATOMIC_CMPSWAP ( #357 )
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shader: implement RDNA2 buffer atomic compare swap
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-03 23:34:34 +02:00
b3c8f91a84
graphics: implement RDNA2 buffer atomic swap x2
2026-09-03 10:17:04 +02:00
858c18468b
graphics: implement RDNA2 buffer atomic OR x2
2026-09-03 05:39:05 +02:00
2d5023fda2
shader: support IMAGE_ATOMIC_SWAP ( #456 )
2026-09-03 03:37:55 +02:00
86e3c90e32
shader: simplify image resource semantics
2026-09-02 15:45:15 +02:00
e591a66b67
Revert "shader: preserve raw VCC bits in S_MOV_B64 ( #418 )"
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This reverts commit 6758d67942
2026-09-01 07:50:37 +04:00
6758d67942
shader: preserve raw VCC bits in S_MOV_B64 ( #418 )
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* shader: preserve raw VCC bits in S_MOV_B64
* fix(shader): centralize scalar U64 mask provenance
---------
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-31 03:04:16 +04:00
5bd447d2a2
shader: implement DS_BPERMUTE_B32
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
2026-08-29 19:23:19 +04:00
ffa69d48de
shader: remove second IR layer
2026-08-26 08:49:39 +02:00
bc9c70d50f
shader: implement RDNA2 V_LSHLREV_B64
2026-08-23 16:39:01 +02:00
8d01fb1c18
shader: DS_READ_U16_D16, V_LSHRREV_B64,
2026-08-23 01:19:47 +02:00
a610528075
shader: V_CMPX_NE_I64
2026-08-23 00:59:44 +02:00
Nawid3333