3c4124dafa
shader: emit F32 min/max as exact compare-selects, MED3 with one max and saturate as NClamp
2026-10-20 23:36:26 +02:00
1ce663b5a9
shader: lower HS neighbour LDS reads, control-point output read-back, looped HS reflection and integer partitioning
...
Co-authored-by: NeySlim <4509984+NeySlim@users.noreply.github.com >
2026-10-20 22:18:00 +02:00
6ad393775f
memory: write GPU publishes to backed pages and skip reserved holes like sparse reads
2026-10-20 15:53:23 +02:00
f492027be2
shader: select pointer-table images through indexed x3 material keys in readlane waterfalls
2026-10-20 15:21:19 +02:00
63ca9c0b80
shader: decode PS5 image_gather4_c_a and image_gather4_c_o_a
2026-10-20 15:21:19 +02:00
f3e01aaf1e
tests: cover tessellation patch constants, predicated mul24 addresses, and forward-branch joins
2026-10-20 15:21:19 +02:00
18e6747dbf
audio: allow looping waveform blocks and exit-loop on NGS2 custom samplers
2026-10-20 15:21:19 +02:00
6b6274fa5a
audio: route NGS2 custom rack buffers and run USER_FX side-chain modules
2026-10-20 15:21:19 +02:00
1a053f9e13
shader: accept dword SETPC tables whose load reuses the selector
2026-10-20 05:11:48 +02:00
f186b35706
shader: drop null checks on the stage input info pointers
2026-10-20 03:22:40 +02:00
992a83003d
tests: stub VR pad ports in controller settings tests ( #1741 )
...
* tests: stub VR pad ports in controller settings tests
#1726 added PadVrPortHand/PadVrPort/PadVrClose calls to controller.cpp,
which controller_settings_tests #includes directly, breaking its link
(the full-emulator tests pick up libs/padVr.cpp via glob and are fine).
Stub the three VR entry points as unavailable, matching the file's
existing DualSenseHaptics fakes.
🤖 Generated with Codebuff
Co-Authored-By: Codebuff <noreply@codebuff.com >
* tests: stub PadVrCheckHandle for the Windows controller settings link
---------
Co-authored-by: Matthew Hurley <171001439+theantipopau@users.noreply.github.com >
Co-authored-by: Codebuff <noreply@codebuff.com >
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-20 03:22:27 +02:00
fde0b98e69
gpu: preserve zero-stride buffer fetch payloads
2026-10-19 12:23:43 +02:00
d4465faa79
gpu: preserve ordered-append command order
2026-10-19 11:46:39 +02:00
e5f0ee7fc2
gpu: preserve finite buffer descriptors across sparse PRT holes
2026-10-19 05:26:41 +02:00
2c730e58ea
revert HTile lifetime changes and opt-in ZMask support
2026-10-19 05:04:56 +02:00
e87fb8c859
kernel: hand guest mutex ownership directly to FIFO waiters
2026-10-19 05:04:56 +02:00
440245f616
gpu: bound overlapping image copies by both native backings
2026-10-19 05:04:56 +02:00
05d25ef28c
revert 01ce97388: restore compute metadata clear consumption
2026-10-19 05:04:56 +02:00
cad6aafdc5
shader: detect and loudly skip unsupported GPU-buffer callables
2026-10-19 05:04:56 +02:00
defb2f11d3
Share median classifications and preserve RDNA2 signed-zero selection
2026-10-19 02:34:25 +02:00
75d7a4311d
Share repeated SSA bitcasts and guard emitted shader size
2026-10-19 02:34:25 +02:00
bb505a3ae8
Recognize packed descriptor keys in GPU sampler waterfalls
2026-10-19 02:34:25 +02:00
ab8566591f
shader: link multiple compute helpers without synthetic return loops
2026-10-19 02:34:25 +02:00
b2d3ce6dfc
shader: size expanded sampler bindings independently of native roots
2026-10-19 02:34:25 +02:00
09c993dfe0
shader: query dimensions through shared indirect image selection
2026-10-19 02:34:25 +02:00
de81300b28
shader: bound indexed material image selectors before heap expansion
2026-10-19 02:34:25 +02:00
ac3711ce7c
shader: select the primary mip for linear explicit-LOD gathers
2026-10-19 02:34:24 +02:00
8b51370ca1
shader: eliminate predicates for empty branch detours
2026-10-19 02:34:24 +02:00
e9bcc77e0b
shader: retain resource guards for 64-bit scalar comparisons
2026-10-18 20:22:54 +02:00
8639e0de81
shader: share indirect image accesses by type and guard emitted size
2026-10-18 20:16:49 +02:00
7675579e79
kernel: implement POSIX fsync through the shared file API
2026-10-18 20:15:53 +02:00
22ef16a044
shader: implement PS5 vector data cache invalidation
2026-10-18 15:57:14 +02:00
33208a545a
shader: remove artificial sampled image and sampler pair limit
2026-10-18 03:20:38 +02:00
4059179e9d
graphics: write proven compute buffer fills to guest memory ( #1628 )
...
Avoid readbacks for compute metadata fills
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-18 05:42:14 +02:00
fe3857a171
graphics: materialize CMASK clears for multisampled targets (PPSA13794)
2026-10-18 02:37:56 +02:00
c3e7ec8285
graphics: fix Jusant regression from d8c4a9af3
2026-10-18 01:03:37 +02:00
763d3be3a9
graphics: add opt-in ZMask support and launcher rendering options
2026-10-17 17:50:02 +02:00
d8c4a9af38
graphics: preserve HTILE metadata across native image replacement
2026-10-17 17:31:25 +02:00
415387f00d
Support multiple controllers for local multiplayer ( #1583 )
...
* Support multiple controllers for local co-op
2026-10-17 13:15:22 +02:00
9f88043ebe
shader: use compact integer RTZ half conversion
2026-10-17 12:23:12 +02:00
c2173801d4
shader: skip resources in proven empty unsigned loops
2026-10-17 10:38:14 +02:00
56d03f16e9
network: UDPP2P
2026-10-17 10:24:45 +02:00
3ecc6b7d1b
network: implement POSIX socket shutdown on Linux
2026-10-17 10:10:16 +02:00
5bf37f52ad
renderer: clear compressed stencil with pending depth metadata
2026-10-17 09:50:11 +02:00
57791645e4
renderer: track attachment load clears by image aspect
2026-10-17 09:34:51 +02:00
d1fe1324c8
shader: keep coherent 64bit atomic
2026-10-17 07:52:20 +02:00
ae25558321
shader: size NGG primitive outputs from amplification
2026-10-17 06:54:45 +02:00
ec08ea197b
shader: new fill pattern
2026-10-17 06:24:29 +02:00
b82512be06
shader: read float inline constants on 64-bit operands as f64 bits ( #1576 )
...
A float inline constant (240-248) read by a 64-bit operand is the f64 bit
pattern for integer B64 opcodes too: AMD's compilers emit
v_lshrrev_b64 v[4:5], v0, 1.0 for 0x3ff0000000000000 >> lane. ReadU32Pair
returned {f32 bits, 0}, so only F64-typed reads had the right value.
Based on TheCruZ's 284deab28 (closed #1219 ).
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-17 05:21:06 +02:00
ba8b0c85b8
shader: keep quiet NaNs with payload bits out of the packed f16 min/max sNaN path ( #1579 )
...
V_PK_MIN_F16 and V_PK_MAX_F16 return the quieted NaN for a signaling NaN
operand and the other operand for a quiet one (per half, as V_MIN_F16 and
V_MAX_F16 do). The signaling test masked the half with 0x7c00 and checked
for a nonzero payload, so a quiet NaN with payload bits such as 0x7e01 was
taken as signaling and returned. Mask with 0x7e00 so the quiet bit must be
clear.
Two more vectors in PackedMinMaxF16NanAndSignedZeroEdges cover it.
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com >
2026-10-17 05:12:37 +02:00
nmzik