nmzik
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e4aca7a60b
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shader: initialize EXEC from requested dispatch thread extents
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
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2026-10-04 18:39:34 +04:00 |
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nmzik
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f58014ff0e
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shader: preserve wave-wide vector-store completion before publication
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2026-10-04 18:39:34 +04:00 |
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nmzik
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73615c31ff
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graphics: preserve logical alpha when blending reordered targets (PPSA02721)
Co-authored-by: EmK530 <admin@emk530.net>
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2026-09-29 19:52:40 +04:00 |
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nmzik
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0791f921f6
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UFC 5 in-game (#883)
* shader: release descriptor dependencies
* shader: simplify shared-exit control flow
* shader: fix scalar memory loads
* shader: fix LDS counter bounds
* renderer: skip inactive pixel shaders
* shader: respect FP32 mode in comparisons
* renderer: fix sampler border colors
* shader: resolve descriptors from control flow
* shader: resolve descriptors before resource planning
* shader: handle scalar guards for image bounds
* shader: handle reduced guards for image loops
* shader: fix wave guards and material indices
* shader: preserve scalar buffer offset alignment and carry
* shader: prove masked loop bounds across iteration transitions
* shader: preserve source and IR before resource tracking failures
* shader: track material keys selected from active lanes
* shader: remove obsolete post-dominator analysis
* shader: follow bounds guards through control-flow joins
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2026-09-28 16:03:05 +04:00 |
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nmzik
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f9e56ef8a0
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Scope native barriers to shaders with shared execution
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2026-09-22 11:11:36 +04:00 |
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nmzik
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bfc8cd0e0b
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shader: DPP8 moves
Co-authored-by: foufouadi <attar.foued@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
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2026-09-18 09:11:55 +04:00 |
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nmzik
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0d9e95d96a
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Fix centroid interpolation weights
PPSA03792
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2026-09-15 19:51:30 +04:00 |
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nmzik
|
86414760e6
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Cull zero homogeneous vertex positions before rasterization
Fix Playroom top right artifact on Nvidia by clipping zero-position vertices.
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2026-09-15 11:24:05 +04:00 |
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nmzik
|
7b5a33f878
|
Fix PS5 front-face VGPR encoding to restore scene lighting
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2026-09-15 07:01:10 +04:00 |
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nmzik
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87971a28f5
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gpu: isolate tessellation analysis and SPIR-V emission
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2026-09-14 06:58:32 +04:00 |
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nmzik
|
7516068662
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gpu: compile RDNA2 tessellation through native LS HS and TES stages
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2026-09-14 06:58:32 +04:00 |
|
nmzik
|
1208d22547
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Fix Windows Clang SPIR-V serialization with typed operands
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2026-09-12 13:08:23 +02:00 |
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nmzik
|
20e57994cf
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shader: reuse native emitters and simplify memory dispatch
|
2026-09-12 13:42:15 +04:00 |
|
nmzik
|
59ef88c959
|
shader: generate SPIR-V dispatch and marshal handler arguments
|
2026-09-12 13:42:15 +04:00 |
|
nmzik
|
1d1f00bdef
|
shader: use Khronos definitions and simplify compiler ownership
|
2026-09-12 13:42:15 +04:00 |
|
nmzik
|
f9f8e12c35
|
shader: add viewport-index exports and indexed raster state
Co-authored-by: Ettore Sartori <85788613+Ekt0re@users.noreply.github.com>
|
2026-09-06 10:16:38 +04:00 |
|
nmzik
|
b346f58b73
|
shader: read sample IDs from pixel ancillary input
|
2026-09-06 06:54:38 +04:00 |
|
nmzik
|
b96a30ed88
|
shader: keep fragment layer values under lane masks
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
|
2026-09-05 11:43:49 +04:00 |
|
nmzik
|
3213934d42
|
shader: run merged geometry stages as mesh shaders
Co-authored-by: Brandon Strong <brandostrong@gmail.com>
Co-authored-by: fxpw <fxpw@outlook.com>
Co-authored-by: shadowbeat070 <70843316+shadowbeat070@users.noreply.github.com>
|
2026-09-05 08:32:23 +04:00 |
|
nmzik
|
0c4dfd565e
|
renderer: emulate clip-disabled screen-space positions
|
2026-09-01 21:39:11 +04:00 |
|
nmzik
|
ffa69d48de
|
shader: remove second IR layer
|
2026-08-26 08:49:39 +02:00 |
|
nmzik
|
a2baaccc6e
|
shader: fix auxiliary position exports
|
2026-08-22 02:58:35 +02:00 |
|
nmzik
|
5e64efce4f
|
graphics: support RDNA2 custom pixel interpolation
Co-authored-by: Senaxx <Senaxx@users.noreply.github.com>
|
2026-08-21 23:33:40 +02:00 |
|
nmzik
|
49ea1680f8
|
graphics: use per-invocation shader masks
|
2026-08-21 08:03:22 +02:00 |
|
nmzik
|
79443aa104
|
shader: decode compressed UNORM16 MRT exports
|
2026-08-21 05:23:09 +02:00 |
|
Senaxx
|
56a15c2036
|
Implement RDNA2 per-invocation scratch memory
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
85cf965d54
|
refactor(shader): centralize typed resource metadata
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
6e9f162bd4
|
refactor(shader): compact paired 64-bit lowering
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
c236ba713d
|
refactor(shader): preserve native wide shared operations
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
c9e942a972
|
refactor(shader): compact whole-quad mask lowering
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
d34e30d892
|
refactor(shader): emit SPIR-V declarations on demand
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
e1bcc298a0
|
refactor(shader): remove register-state compatibility paths
|
2026-08-21 03:32:47 +02:00 |
|
nmzik
|
01275fb211
|
shader_recompiler: rename/clean up typed SSA SPIR-V emitter
|
2026-08-18 03:53:45 +02:00 |
|