d1c99bbfb0
Consolidate instruction operand bounds checks
2026-10-02 13:24:03 +04:00
28f29b8e6f
Inline common IR operands and share storage with Phi pairs
2026-10-02 13:24:03 +04:00
3353c1ff3b
shader: pack the runtime evaluation index beside the IR opcode
2026-10-02 13:24:03 +04:00
b3e419ff11
shader: implement 32-bit RDNA2 IMAGE_ATOMIC_CMPSWAP ( #952 )
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* shader: implement 32-bit RDNA2 image atomic compare-and-swap
* shader: share atomic emission and correct image barriers
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-10-02 01:15:53 +04:00
2b2915e271
Reuse SSA read traversal storage within each pass
2026-10-02 00:53:51 +04:00
35759e48cf
shader: expose wave32 feature guards through ballot mask simplification
2026-10-02 00:51:15 +04:00
6409be2874
shader: respect branch reachability when refreshing scalar resources
2026-10-02 00:51:15 +04:00
0d0b215fab
shader: port 64-bit ALU and atomic opcodes
2026-10-02 00:51:15 +04:00
337f432016
shader: execute PS5 BVH intersections and local FLAT stacks
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Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
Co-authored-by: Mac <me@itsmemac.com >
Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Jean-Philippe <github@meunier.jp >
2026-10-02 00:51:15 +04:00
581dad7dd3
shader: implement RDNA2 FP64 equality comparisons
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Co-authored-by: Senaxx <michelbeld@gmail.com >
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com >
2026-10-02 00:51:15 +04:00
73615c31ff
graphics: preserve logical alpha when blending reordered targets (PPSA02721)
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Co-authored-by: EmK530 <admin@emk530.net >
2026-09-29 19:52:40 +04:00
6799ecbc5b
shader: add native 64-bit LDS OR with shared typed storage views
2026-09-29 19:13:33 +04:00
c8baa7b909
shader: derive immutable resource policy once per plan
2026-09-28 18:01:49 +04:00
0a5774be7b
shader: support FP64 conversions used by FighterZ ( #884 )
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shader: support float and unsigned widening to FP64
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-28 17:39:31 +04:00
0791f921f6
UFC 5 in-game ( #883 )
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* shader: release descriptor dependencies
* shader: simplify shared-exit control flow
* shader: fix scalar memory loads
* shader: fix LDS counter bounds
* renderer: skip inactive pixel shaders
* shader: respect FP32 mode in comparisons
* renderer: fix sampler border colors
* shader: resolve descriptors from control flow
* shader: resolve descriptors before resource planning
* shader: handle scalar guards for image bounds
* shader: handle reduced guards for image loops
* shader: fix wave guards and material indices
* shader: preserve scalar buffer offset alignment and carry
* shader: prove masked loop bounds across iteration transitions
* shader: preserve source and IR before resource tracking failures
* shader: track material keys selected from active lanes
* shader: remove obsolete post-dominator analysis
* shader: follow bounds guards through control-flow joins
2026-09-28 16:03:05 +04:00
496432bbb4
Shader: skip identity image remapping on materialization hits
2026-09-27 10:47:18 +04:00
bec67b7863
Fix HITMAN 3 boot, layered presentation, and socket imports ( #851 )
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* videoout: synchronize layered flips with premultiplied composition
* shader: support unsigned FFBH subword sources
* shader: apply cube-face result scaling
* shader: prune buffer reads proven out of bounds
* net: implement send and receive exports with shared socket handling
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-09-27 02:13:30 +04:00
16b83a034c
Shader: execute RDNA2 FP64 shadow arithmetic and log denorm limits
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Shader: disable FP64 denorm preservation controls for now
2026-09-26 15:15:35 +04:00
cf268af839
Shader: implement RDNA2 image atomic float maximum
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Shader: implement RDNA2 image atomic float minimum
Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: frans <francois.att@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
Co-authored-by: Matthew Hurley <171001439+theantipopau@users.noreply.github.com >
2026-09-26 15:15:35 +04:00
cda236dbb3
Shader recompiler: accept V_NOT_B32 SDWA partial dst with any source; allow 64 buffers
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SDWA source extraction and destination insertion are independent. Cover the reported word1-to-word0 preserve form and byte-source partial destinations in compute tests. Verify 64 distinct compute buffers survive resource tracking and binding layout, and remove the obsolete CFG rejection.
(cherry picked from commit 9e74df7dc0
2026-09-26 01:58:55 +04:00
93185953f1
shader: fuse image specialization setup with materialization
2026-09-25 14:27:09 +04:00
dc9280d75d
shader: add GLC/DLC buffer cache policy support
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Co-authored-by: Mac <me@itsmemac.com >
2026-09-24 20:46:04 +04:00
392f39e2f6
shader: support indirect BUFFER_LOAD_DWORDX3
2026-09-24 20:46:04 +04:00
963a0817dc
Bound uniformized image keys by guarded material mask
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Co-authored-by: TarkusR <90155059+TarkusR@users.noreply.github.com >
2026-09-24 11:13:33 +04:00
1617ee77e5
Share CFG reachability for descriptor bounds analysis
2026-09-24 11:13:33 +04:00
3b89e36d1e
Track bounded indirect image tables from signed shader loops
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Co-authored-by: TarkusR <90155059+TarkusR@users.noreply.github.com >
2026-09-24 11:13:33 +04:00
5ed5fdd36e
Preserve resource level bits in texture descriptors
2026-09-23 15:41:02 +04:00
ef83ba65ad
Validate texture descriptor fields
2026-09-23 15:41:02 +04:00
d30dca78be
Read image descriptors in one bounded span
2026-09-23 15:41:02 +04:00
66f1a82365
Resolve scalar image tables during resource planning
2026-09-23 15:41:02 +04:00
eb8a5504a3
Emit coordinates for each indirect image candidate
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
2026-09-23 15:41:02 +04:00
5d1ad31c49
Resolve guarded descriptor Phis at their use edge
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
Co-authored-by: GodsWill <GodsWill@users.noreply.github.com >
2026-09-23 15:41:02 +04:00
13fcb3a133
Refresh cached resources in one SRT walk
2026-09-23 15:41:02 +04:00
d6dac92da1
Reuse scalar evaluation storage
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Co-authored-by: MehmetCambaz <mcambaz18@gmail.com >
Co-authored-by: Leclowndu93150 <xdr.a123454321@gmail.com >
2026-09-23 15:41:02 +04:00
4b074cf9e9
Avoid heap allocation when compacting materialized shader images
2026-09-22 11:38:50 +04:00
d2df2cad74
Resolve draw-uniform image descriptors through scalar buffer chains
2026-09-22 11:38:50 +04:00
b2a80a3a96
Resolve GPU-selected raw buffer descriptors through shared RDNA2 addressing
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Co-authored-by: Bipin <87369440+bipinkrish@users.noreply.github.com >
2026-09-22 11:38:50 +04:00
102a10f0fe
Fix signed sampler comparisons
2026-09-20 17:16:19 +04:00
bfc8cd0e0b
shader: DPP8 moves
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Co-authored-by: foufouadi <attar.foued@gmail.com >
Co-authored-by: fxpw <fxpw@outlook.com >
2026-09-18 09:11:55 +04:00
5dc644edb4
clean up graphics helpers
2026-09-17 20:35:36 +04:00
bc45aaf604
Track uniform sampler choices across both conditional arms
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Related work: https://github.com/KytyPS5/KytyPS5/pull/558
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-09-16 22:33:19 +04:00
af3a3f4bf6
Preserve uniform conditional sampler choices in resource plans
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Related work: https://github.com/KytyPS5/KytyPS5/pull/558
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com >
2026-09-16 22:33:19 +04:00
441367b1a1
Fix pixel shader input aliases
2026-09-15 20:46:51 +04:00
0d9e95d96a
Fix centroid interpolation weights
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PPSA03792
2026-09-15 19:51:30 +04:00
7516068662
gpu: compile RDNA2 tessellation through native LS HS and TES stages
2026-09-14 06:58:32 +04:00
5a31de7955
shader: keep derived frontend metadata with its owner
2026-09-12 13:42:15 +04:00
1d1f00bdef
shader: use Khronos definitions and simplify compiler ownership
2026-09-12 13:42:15 +04:00
25a44371e3
refactor(graphics)
2026-09-12 13:40:10 +04:00
e04007a7c6
shader: implement DS_INC_RTN_U32 and DS_DEC_RTN_U32
2026-09-09 12:56:20 +04:00
839c172612
shader: reuse operands and remove duplicate helpers
2026-09-08 21:26:59 +04:00
nmzik