6758d67942
shader: preserve raw VCC bits in S_MOV_B64 ( #418 )
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* shader: preserve raw VCC bits in S_MOV_B64
* fix(shader): centralize scalar U64 mask provenance
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-31 03:04:16 +04:00
9992ab18fc
shader: preserve untouched half in VOP1 B16 writes ( #370 )
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shader: preserve native 16-bit destinations
Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 19:33:26 +04:00
18af08460f
shader: take the high half per lane in V_PK_FMAC_F16 ( #404 )
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 15:08:22 +04:00
39ee9972b8
shader: V_CMPX_CLASS_F32
2026-08-30 14:32:07 +04:00
ff61c1cecd
shader: implement V_SIN_F16 ( #399 )
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-30 01:32:49 +04:00
1a87cfedb5
shader: implement V_COS_F16
2026-08-29 19:23:19 +04:00
5bd447d2a2
shader: implement DS_BPERMUTE_B32
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Co-authored-by: Techx3 <56268269+Techx3@users.noreply.github.com >
2026-08-29 19:23:19 +04:00
ef639610e7
shader: allow SDWA add-with-carry
2026-08-29 15:31:20 +04:00
fcc9dff5b9
shader: DS_WRITE_B16_D16_HI
2026-08-29 14:40:13 +04:00
d9ae3ed64c
shader: V_FFBH_I32
2026-08-29 14:03:57 +04:00
53a59434d8
shader: implement V_CMP_EQ_U64
2026-08-29 11:26:05 +04:00
18b6c9059b
shader: support DS_READ_U16_D16_HI ( #356 )
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Decode the high-half D16 LDS read and route it through the existing unsigned-short load lowering. Represent the destination as a high-half partial write so the low 16 bits of the VGPR remain intact. Add captured-instruction decode coverage and a Vulkan execution regression that verifies the preserved half.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com >
2026-08-29 10:39:45 +04:00
715539804b
shader: accept SDWA for VOP1 bit operations ( #360 )
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Allow byte, word, and full-dword SDWA source selection for V_NOT_B32 and V_FFBL_B32. Add captured instruction tests that verify decoding, IR extraction, SPIR-V generation, and runtime results.
Co-authored-by: SueryRD <the.ai.tester2@gmail.com >
2026-08-29 10:28:28 +04:00
b02eb28fd1
shader: support SDWA byte left-shift counts
2026-08-29 10:03:13 +04:00
07f1e77d23
shader: support SDWA byte shift counts
2026-08-29 10:03:13 +04:00
1ff580498c
shader: support V_CMPX_NGT_F16 SDWA
2026-08-27 04:25:11 +02:00
ae896d0bf6
shader: support V_CMPX_GT_U16 SDWA
2026-08-27 04:13:12 +02:00
e738535294
graphics: add RDNA2 FLAT BDA buffer cache and faults
2026-08-27 03:45:41 +02:00
ab50c10d08
graphics: split shader translation into explicit opcode dispatchers
2026-08-26 08:49:39 +02:00
ffa69d48de
shader: remove second IR layer
2026-08-26 08:49:39 +02:00
bc9c70d50f
shader: implement RDNA2 V_LSHLREV_B64
2026-08-23 16:39:01 +02:00
8d01fb1c18
shader: DS_READ_U16_D16, V_LSHRREV_B64,
2026-08-23 01:19:47 +02:00
a610528075
shader: V_CMPX_NE_I64
2026-08-23 00:59:44 +02:00
0d92ce49da
shader: support RDNA2 V_CMPX_NE_U64
2026-08-22 04:38:13 +02:00
4179bb5b06
shader: route inner shared exits first
2026-08-22 04:00:37 +02:00
9241fdc32a
shader: align float semantics with RDNA2 default mode
2026-08-22 03:16:45 +02:00
5e64efce4f
graphics: support RDNA2 custom pixel interpolation
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Co-authored-by: Senaxx <Senaxx@users.noreply.github.com >
2026-08-21 23:33:40 +02:00
49ea1680f8
graphics: use per-invocation shader masks
2026-08-21 08:03:22 +02:00
61dd8a3031
shader: accept byte-selected CNDMASK SDWA operands
2026-08-21 03:32:49 +02:00
0966938dc8
shader: honor RDNA2 128-bit image descriptors
2026-08-21 03:32:48 +02:00
d5410a93c8
graphics: preserve FP16 inline constants
2026-08-21 03:32:48 +02:00
129c64235f
graphics: implement RDNA2 D16 image packing
2026-08-21 03:32:48 +02:00
88c351f0fa
shader: canonicalize SampleAdjust sampler scratch bits
2026-08-21 03:32:48 +02:00
fbdc1e8714
shader: implement RDNA2 scalar quad-mask reduction
2026-08-21 03:32:48 +02:00
7f66a61801
shader: reject rejoining early-exit routes
2026-08-21 03:32:48 +02:00
2bd9f4124f
shader: structurize nested early-exit tails
2026-08-21 03:32:48 +02:00
705fc93363
shader: initialize compute EXEC from active subgroup
2026-08-21 03:32:48 +02:00
56a15c2036
Implement RDNA2 per-invocation scratch memory
2026-08-21 03:32:47 +02:00
2db0b3cfa7
shader: fix shared-terminal selection merges
2026-08-21 03:32:47 +02:00
4710522e87
shader: canonicalize CFG loop headers
2026-08-21 03:32:47 +02:00
87166eed94
refactor(shader): reduce dispatcher state overhead
2026-08-21 03:32:47 +02:00
6e9f162bd4
refactor(shader): compact paired 64-bit lowering
2026-08-21 03:32:47 +02:00
8063822243
refactor(shader): preserve native scalar memory operations
2026-08-21 03:32:47 +02:00
c236ba713d
refactor(shader): preserve native wide shared operations
2026-08-21 03:32:47 +02:00
c9e942a972
refactor(shader): compact whole-quad mask lowering
2026-08-21 03:32:47 +02:00
5383972e96
refactor(shader): preserve native wide buffer operations
2026-08-21 03:32:47 +02:00
e1bcc298a0
refactor(shader): remove register-state compatibility paths
2026-08-21 03:32:47 +02:00
596ecdcca0
Fix shader CFG structurization for nested early exits
2026-08-19 00:14:51 +02:00
c4ca8f4bf8
shader: fix the Linux and macOS build ( #285 )
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* fixed linux build
- added correct uint long translation
- replaced throw with non-constexpr function so that it fails in case of malformed table
* shader: remove redundant opcode table comment
* shader: use EXIT for invalid opcode tables
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Co-authored-by: nmzik <Nmzik@mail.ru >
2026-08-18 14:41:48 +02:00
377fb8f50a
shader: use ISA-style decoder opcode names
2026-08-18 03:53:45 +02:00
nomolao2-cell