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286481889fcdda9390c6ef2bf7e66c84aff978ba
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74 Commits

Author SHA1 Message Date
Arda Sahin 286481889f shader: emit float min/max as host instructions on AMD GPUs (#1761) 
* shader: emit float min/max as host instructions on AMD GPUs

V_MIN_F32, V_MAX_F32, V_MIN3_F32 and V_MAX3_F32 were emulated with a
classify-and-select sequence of about a dozen instructions each, to give
the guest's NaN and signed-zero results on any host. AMD GPUs execute
GLSL.std.450 NMin/NMax with those same rules, so emit them directly when
the device is AMD and supports VK_KHR_shader_float_controls2. Each
instruction is decorated FPFastMathMode None, since
SignedZeroInfNanPreserve does not cover extended instructions. MED3 keeps
its exact emulation. KYTY_EMULATED_FLOAT_MIN_MAX=1 keeps the emulation.

In SAROS the two heaviest compute shaders get 37% and 59% faster on an
RX 9070 XT (RADV), about 4 ms of GPU time per frame.

Adds VectorMinMaxF32RuntimeEdges (runtime operands, so nothing is folded)
and a --float-min-max-only mode that runs it and
VectorMinMaxF32NanAndSignedZeroEdges with the emulation and, where
supported, with host instructions.

Developed with AI assistance (Claude Code).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* shader: gate host float min/max on RADV and check the emitted instructions

* shader: drop float controls 2 from host float min/max

* shader: drop the float min/max env override and atomic flag

* shader: pass host capabilities to the SPIR-V emitter as a profile built once per device

* shader: enable host float min/max on AMD GPUs

---------

Co-authored-by: arda <ardaeska@gmail.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-21 21:36:08 +02:00
nmzik 13b291f998 gpu: honour DB_ALPHA_TO_MASK as alpha-to-coverage and keep its depth writes behind the shader 2026-10-21 19:17:50 +02:00
Mr. Big Britches feed075a9f gpu: implement PA_CL_UCP user clip planes through draw push constants 2026-10-20 15:21:19 +02:00
Pixeluted cad6aafdc5 shader: detect and loudly skip unsupported GPU-buffer callables 2026-10-19 05:04:56 +02:00
nmzik ab8566591f shader: link multiple compute helpers without synthetic return loops 2026-10-19 02:34:25 +02:00
nmzik 37df7f3278 Show pipeline cache sizes in MB and remove obsolete texture folder cleanup 2026-10-18 03:57:45 +02:00
Juan Pablo Farias 6aa3846fb2 feat: add an in-game performance panel (#1090) 
Add in-game performance panel

Co-authored-by: nmzik <Nmzik@mail.ru>
 2026-10-17 14:47:51 +02:00
shadowbeat070 d58aefde49 renderer: reduce synchronization and allocation overhead 
Performance changes from #1495:

- Sync changed BDA ranges instead of scanning all mappings.
- Let VMA suballocate BDA buffers.
- Remove the renderer lock from presentation.
- Keep compatible pipeline caches across builds.
- Fold masked shifts that always produce zero.
 2026-10-16 17:18:49 +02:00
nmzik f7226ca7dc graphics: emit PS5 register object and primitive IDs to RT7 2026-10-15 22:28:01 +02:00
nmzik 959bee4799 graphics: checkpoint live Vulkan pipeline cache after new compilations 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-15 22:28:01 +02:00
nmzik b4406b0467 graphics: render packed 11-11-10 UNorm targets with exact rounding 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-15 22:28:01 +02:00
nmzik 50844badbf shader: map debug SPIR-V blocks to native RDNA2 PCs 2026-10-15 22:28:01 +02:00
nmzik ceccd746d8 shader: resolve workgroup-selected descriptor prefixes from dispatch arguments 
Co-authored-by: fxpw <fxpw@outlook.com>
 2026-10-14 20:29:48 +02:00
Ali Almohaya 460a196fca shader: emit dynamic sample offsets with the enabled maintenance8 feature 2026-10-13 21:27:07 +00:00
nmzik 3e9f88bf79 shader: isolate SWAPPC work from ordinary shader paths 2026-10-09 17:27:07 +02:00
nmzik 1818aae562 shader: link scalar leaf calls only for SWAPPC programs 
Co-authored-by: Behzad <behzadkhan1736@gmail.com>
 2026-10-09 15:06:39 +00:00
nmzik b38b7454a6 Preserve vertex export locations for mixed pixel interpolation 2026-10-08 22:05:53 +04:00
nmzik 984010227f graphics: make depth bounds dynamic to reuse pipelines 
Co-authored-by: TheCruZ <thecruzwtf@gmail.com>
 2026-10-06 00:35:02 +04:00
nmzik 94e7d239dd gpu: fix zero-source alpha blending on swizzled targets 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 96011cc5c9 gpu: share pipelines when color and alpha blend equations match 2026-10-05 02:24:51 +04:00
nmzik b0bbaef1eb gpu: store large compute shared memory in device buffers 2026-10-05 02:24:51 +04:00
nmzik 0ee8800905 shader: read image descriptors indexed by workgroup 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 0bef3fc0d3 gpu: fix separate alpha blending on swizzled render targets 
Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-10-05 02:24:51 +04:00
nmzik 783d9f8d6b shader: read descriptor dependencies from the native raw buffer source 2026-10-04 18:39:34 +04:00
nmzik 57cf086886 shader: synchronize GPU-written descriptor dependencies through buffer cache 2026-10-04 18:39:34 +04:00
Hamza Shakir e6cb880adb Clamp compute LDS to the device limit and ignore unopenable gamepads 2026-10-03 04:27:38 +04:00
nmzik b86cf0a820 Reuse pipelines when inactive blend settings change 2026-10-02 00:52:49 +04:00
nmzik 337f432016 shader: execute PS5 BVH intersections and local FLAT stacks 
Co-authored-by: Ali Almohaya <AliAlmohaya@gmail.com>
Co-authored-by: Mac <me@itsmemac.com>
Co-authored-by: Senaxx <michelbeld@gmail.com>
Co-authored-by: Jean-Philippe <github@meunier.jp>
 2026-10-02 00:51:15 +04:00
nmzik 73615c31ff graphics: preserve logical alpha when blending reordered targets (PPSA02721) 
Co-authored-by: EmK530 <admin@emk530.net>
 2026-09-29 19:52:40 +04:00
nmzik 6d6666819a graphics: serialize pipeline cache through its renderer owner 2026-09-29 13:57:32 +04:00
nmzik 0fbeac6d3f graphics: compact shader keys and hash packed pipeline state 2026-09-29 13:57:32 +04:00
nmzik b43bf9f7fb graphics: store vertex attribute bindings without duplicated arrays 2026-09-29 13:57:32 +04:00
nmzik 0791f921f6 UFC 5 in-game (#883) 
* shader: release descriptor dependencies

* shader: simplify shared-exit control flow

* shader: fix scalar memory loads

* shader: fix LDS counter bounds

* renderer: skip inactive pixel shaders

* shader: respect FP32 mode in comparisons

* renderer: fix sampler border colors

* shader: resolve descriptors from control flow

* shader: resolve descriptors before resource planning

* shader: handle scalar guards for image bounds

* shader: handle reduced guards for image loops

* shader: fix wave guards and material indices

* shader: preserve scalar buffer offset alignment and carry

* shader: prove masked loop bounds across iteration transitions

* shader: preserve source and IR before resource tracking failures

* shader: track material keys selected from active lanes

* shader: remove obsolete post-dominator analysis

* shader: follow bounds guards through control-flow joins
 2026-09-28 16:03:05 +04:00
nmzik d72a79af2d graphics: skip compute dispatches with BVH instructions 
Co-authored-by: Mac <me@itsmemac.com>
 2026-09-24 20:46:04 +04:00
nmzik d30dca78be Read image descriptors in one bounded span 2026-09-23 15:41:02 +04:00
nmzik 03c55e5712 Keep shader user data inline for cached programs 2026-09-23 15:41:02 +04:00
nmzik 13fcb3a133 Refresh cached resources in one SRT walk 2026-09-23 15:41:02 +04:00
nmzik 476204cd4b Initialize native NGG vertex launch state and wave size 2026-09-22 11:11:36 +04:00
nmzik 0ad9149c90 Fix three-vertex rectangle rendering 2026-09-20 17:16:19 +04:00
nmzik 6493674726 shader: dual-source blending (Vulkan) 2026-09-18 09:11:55 +04:00
nmzik b594f8c834 Bind only exported color targets and preserve MRT slots 
Related work: https://github.com/KytyPS5/KytyPS5/pull/558

Co-authored-by: Çağatay Güçlü <33038942+defektu@users.noreply.github.com>
 2026-09-16 22:33:19 +04:00
nmzik 86414760e6 Cull zero homogeneous vertex positions before rasterization 
Fix Playroom top right artifact on Nvidia by clipping zero-position vertices.
 2026-09-15 11:24:05 +04:00
nmzik bce8924dd6 Use dynamic stencil state 2026-09-14 20:29:20 +04:00
nmzik fe26c1de17 Share SPIR-V module creation 2026-09-14 20:29:20 +04:00
nmzik 968cf3c03f Use the correct pixel shader wave size 2026-09-14 20:29:20 +04:00
nmzik 7516068662 gpu: compile RDNA2 tessellation through native LS HS and TES stages 2026-09-14 06:58:32 +04:00
nmzik 7c5473400e config: simplify logging and profiler options. Change to Mailbox 2026-09-12 14:41:34 +04:00
nmzik 1d1f00bdef shader: use Khronos definitions and simplify compiler ownership 2026-09-12 13:42:15 +04:00
nmzik 25a44371e3 refactor(graphics) 2026-09-12 13:40:10 +04:00
nmzik 9d550fbffa graphics: fix last provoking vertex on PS5 2026-09-08 21:26:59 +04:00